Tuesday 27 September 2016

Deadline extension: Workshop on Big Data for Cloud Operations Management: Problems, Approaches, Tools, and Best Practices

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Workshop on
Big Data for Cloud Operations Management: Problems, Approaches, Tools, and Best Practices
------------------------------------------------------------------------------------------------------------
    Both Big Data analytics and Cloud Computing are in growing rapidly. We are observing a widespread adoption of solutions utilizing and combining these frameworks. One key field that the power of Big Data Analytics can be immensely beneficial for Cloud Computing is operational analytics. Cloud Computing enables deployments at scale that can adapt to changing demands. Agile methods use these capabilities to build application and services that rapidly adapt to changing business conditions. With continuous integration and delivery, a cloud environment is very dynamic with changes at many levels. In such an environment, it is necessary to ensure the components and services are configured correctly and securely; the cloud is in a highly available, reliable and secure state; and the services in the cloud are functioning at their optimum levels. Massive amounts of data generated by an ever-increasing number of monitors for components in the IT stack need to be aggregated, analyzed, understood and responsive actions taken in real-time.
    Even newer methods of ensuring availability, reliability and security through both manual and automated testing/configuration are being challenged with increase in scale and speed. Agility demands that developers iterate in a fast pace and identify, diagnose, and, fix problems quickly and correctly. There has been extensive research and development to derive insights from operational data, for example, intelligent resource and security data collection, anomaly and performance variation detection, root cause analysis, configuration analysis, efficient cloud resource utilization, security/vulnerability analysis, etc. This workshop is an effort to bring practitioners together for sharing and validating ideas and finding new approaches for deriving insights from operational data. We invite submission of papers related (but not limited) to the following areas:
Research Topics
-------------------
  * Uses of Big Data analytics in cloud operations management
  * IT operation analytics
  * Data-driven cloud configuration analytics
  * Capturing, Filtering and Representing cloud operational data
  * Tools/ frameworks/ services for operational analytics in cloud
  * Learning/mining techniques for cloud operational analytics
  * Analytics feedback for continuous integration/deployment
  * Experiences/Challenges/Best Practices monitoring cloud deployments
  * Real time data collection and real time analytics in cloud operational management
  * Cost analysis of cloud operational monitoring and analytics
Important Dates
--------------
  Oct 7th, 2016: Due date for full workshop papers submission
  Nov 1, 2016: Notification of paper acceptance to authors
  Nov 15, 2016: Camera-ready of accepted papers due.
  Dec 5-8, 2016: Workshops
Submission Format
-----------------
     The complete submission must be no longer than five (5) pages not including references. We solicit original papers on the topics listed above but we also encourage the submission of shorter position papers that describe novel research directions and work that is in its formative stages, as well as papers about practical experiences and lessons learned from production systems.
     Submissions should be typeset in two-column format in 10-point type on 12-point (single-spaced) leading, with the text block being no more than 6.5" wide by 9" deep. If you wish, you may use this LaTeX template and style file (will ad hyperlink here). The names of authors and their affiliations should be included on the first page of the submission.
 Program Chairs
 ------------------
     Sastry S Duri <sastry@us.ibm.com> (IBM)
     Prabhakar Kudva <kudva@us.ibm.com> (IBM)
     Ata Turk <ataturk@bu.edu> (Boston University)
Steering Committee
-----------------------
     Canturk Isci - IBM
     Ayse K. Coskun - Boston University
     Larry Rudolph - Two Sigma
Program Committee Members
------------------------------------
     Kamer Kaya - Sabanci University
     Alina Oprea - Northeastern University
     David Cohen - Intel
     Weisong Shi - Wayne University
     Chris Stewart - The Ohio State University
     Mukil Kesavan - VMWare
     Susanne Balle - Intel
     Homin Lee - Datadog
     Eyal de Lara - Toronto University
     Mahadev Satyanarayanan - Carnegie Mellon University
     Stefan Zier - Sumologic
     Dilma Da Silva - Texas A&M University
     Thu D. Nguyen - Rutgers University


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IEEE Cloud Magazine Special Issue on Middleware for Multiclouds

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IEEE Cloud Computing Magazine  - Special Issue on Middleware for Multicloud

As Cloud Computing evolved to a widely used computing as a service
model, limitations and intrinsic characteristics of monolithic cloud
provider offerings emerged. Moreover, specialized computing power such
as clusters, GPUs, solid state storage, and specific applications at
different service levels can now be acquired as services from
different providers. The use of a combination of cloud services from
various providers can be performed to contour limitations of a single
provider and enhance application execution by gathering together the
necessary specific, on demand resources for a wide range of
applications. Multicloud Middleware has a central role in providing a
combination of resources from different cloud providers by
implementing a distributed system platform that is able to efficiently
coordinate them.

This IEEE Cloud Computing Magazine Special Issue on Middleware for
Multicloud aims to cover all aspects of design and implementation, as
well as deployment and evaluation of multicloud middleware and its
components. A middleware for multicloud connects multiple clouds to
allow automatic, transparent, and on demand application execution that
takes advantage from the synergy among resources of different
providers. For this synergy to become effective and efficient,
connecting different providers across their boundaries brings new,
challenging efforts. Multicloud middleware design and deployment must
solve challenges that include resource management and scheduling,
identity management, trust and security issues, business models, and
incentive mechanisms in multicloud environments. We invite authors to
submit outstanding and original manuscripts on all aspects related to
middleware for multiclouds, including, but not limited to:


- Cloud Middleware design and implementation
- Auditing and Accounting
- Middleware performance and evaluation
- Middleware for Data Management
- Multicloud Middleware for the Internet of Things
- Middleware for Cloud Federations
- Middleware for Hybrid Clouds
- Brokering Mechanisms
- Resource Discovery and Management
- Scheduling and Load Balancing
- Cross-service-level Mgmt (IaaS, PaaS, SaaS, XaaS)

***** Schedule
Full manuscript due: December 7, 2016
Initial recommendations due: February 22, 2017
Revision due: April 9, 2017
Final decisions due: May 31, 2017
Final manuscript due: June 15, 2017
Publication date: August 2017


***** Submission details
Submissions will go through the IEEE Cloud Computing Magazines’
peer-review process. Articles should be between 3,000 and 5,000 words,
with figures counting for approximately 250 words each and maximum of
15 references should be used. The authors should not assume
specialized audience, thus the manuscript should be understandable to
a broad audience of people interested in cloud computing and
multiclouds. Accepted articles will be edited according to the IEEE
Computer Society style guide. Submit your papers to Manuscript Central
at https://mc.manuscriptcentral.com/ccm-cs.

***** Guest Editors
Dr. Luiz F. Bittencourt, University of Campinas, Brazil, bit@ic.unicamp.br
Dr. Rodrigo N. Calheiros, University of Melbourne, Australia, rnc@unimelb.edu.au
Dr. Craig A. Lee, Aerospace Corporation, United States, Craig.A.Lee@aero.org
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Sunday 25 September 2016

CFP for SAC 2017 CPS Track (Deadline Extended 9/29/2016)

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CALL FOR PAPERS
===============================================
Track on Cyber-Physical Systems (CPS)
The 32th ACM Symposium on Applied Computing (SAC 2017)
April 3 – 7, 2017, Marrakech, Morocco
ACM Symposium on Applied Computing (SAC 2017)
sponsored by ACM Special Interest Group on Applied Computing
=====================================================

Aims and Scope

Cyber-physical Systems (CPS) are engineered systems whose operations are monitored, coordinated, controlled, and integrated by a computing and communication core embedded in all types of objects and structures in the physical environment. CPS has emerged as a unifying name for systems where the cyber parts, i.e., the computing and communication parts, and the physical parts are tightly integrated, both at the design time and during operation. Such systems use computations and communication deeply embedded in and interacting with physical processes to add new capabilities to physical systems. Such systems must be operated safely, dependably, securely, efficiently and in real-time. These cyber-physical systems include a wide range of applications, such as transportation, healthcare, automotive, energy, manufacturing, entertainment, consumer electronics, environmental monitoring, aerospace, robotics, etc., all of which will be essential pieces of our social infrastructure. Therefore, advances in this field will have great technical, economic and societal impacts in the near future. However, the vision of CPS faces some core challenges of multidisciplinary research, as their relevant technologies appear in diverse areas of science and engineering. Therefore, there is an emerging consensus that new methodologies and tools need to be developed to support cyber-physical systems.


ACM TCPS Special Issue

Selected papers will be invited to submit extended version to a special issue on ACM Transactions on Cyber-Physical Systems (TCPS), which is the premier journal for the publication of high-quality original research papers and survey papers in CPS.


Topics of Interest

We plan to include all the important topics related to CPS. These topics include, but are not limited to:

  • Ubiquitous and pervasive computing for enhanced user interactions with CPS
  • Wearable cyber-physical systems and applications
  • Design automation and Tool Chains for CPS
  • Networking systems for CPS applications
  • Cloud computing and distributed systems to support scalability and complexity of CPS
  • Data analytics for CPS
  • Control of CPS
  • Security and privacy of CPS
  • Resilient and Robust System Design for CPS
  • Simulation and experimental prototypes of CPS


Important Dates

Paper submission: September 15, 2016
Acceptance notification: November 10, 2016
Camera-ready copies: November 25, 2016
Author registration: December 10, 2016


Submission Guidelines

Authors are invited to submit original and unpublished papers of research and applications for this track. Full papers are limited to 6 pages with the option for up to 2 additional pages at cost (US$80 per page). The author(s) name(s) and address(es) must not appear in the body of the paper, and self-reference should be in the third person. This is to facilitate double-blind review. Only the title should be shown at the first page without the author's information. Papers must be formatted according to the ACM SAC template. Contributions must contain original unpublished work. Papers that have been concurrently submitted to other conferences or journals (double submissions) will be automatically rejected. For full submission guidelines, please follow the instructions on the ACM SAC 2017 website. Please submit your contribution via SAC 2017 Web page.


Registration

Paper registration is required, allowing the inclusion of the paper/poster in the conference proceedings. An author or a proxy attending SAC MUST present the paper. This is a requirement for the paper/poster to be included in the ACM digital library. No-show of scheduled papers and posters will result in excluding them from the ACM digital library.


Student Research Competition (SRC) Program

Graduate students seeking feedback from the scientific community on their research ideas are invited to submit abstracts of their original unpublished and in-progress research work in areas of experimental computing and application development related to SAC 2017 Tracks. The Student Research Competition (SRC) program is designed to provide graduate students the opportunity to meet and exchange ideas with researcher and practitioners in their areas of interest.

All research abstract submissions will be reviewed by researchers and practitioners with expertise in the track focus area to which they are submitted. Authors of selected abstracts will have the opportunity to give poster presentations of their work and compete for three top winning places. The SRC committee will evaluate and select First, Second, and Third place winners. The winners will receive cash awards and SIGAPP recognition certificates during the conference banquet dinner. Authors of selected abstracts are eligible to apply to the SIGAPP Student Travel Award program for support.

SRC Submission - Graduate students are invited to submit abstracts (minimum of two pages; maximum of four pages) of their original unpublished and in-progress research work following the instructions published at SAC 2017 web-site. The submissions must address research work related to a SAC track, with emphasis on the innovation behind the research idea, including the problem being investigated, the proposed approach and research methodology, and sample preliminary results of the work. In addition, the abstract should reflect on the originality of the work, innovation of the approach, and applicability of anticipated results to real-world problems.

Please note SRCs and regular papers must be submitted at different pages of the START web system. Submitting the same abstract to multiple tracks is not allowed. It is recommended to refer to the official SRC Information Sheet for further details.



Track Chairs


Dr. Tei-Wei Kuo, National Taiwan University and Academia Sinica
Dr. Ai-Chun Pang, National Taiwan University
Dr. Chun Jason Xue, City University of Hong Kong

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PATC training France, nov-dec 2016

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Apologies if you receive multiple copies of this announcement.
Please share the announcement below with those who may be interested.

The PATC partners in France are hosting a number of courses in the coming months. As for all PATC events,these courses are in English and are free of charge for all participants. These are just some of many courses offered by the PRACE Advanced Training Centres based in Finland, France, Germany, Italy, Spain and the UK.

Registration is now open for the following courses:
Mastering GPU-Acceleration on OpenPOWER Platform for Optimal Application Performance2-4 novembre, Idris, Orsay, France
Détails et inscriptions: https://events.prace-ri.eu/event/554 

Debugging and optimization, 5 - 9 décembre, Cines, Montpellier, France
Details et inscriptions: https://events.prace-ri.eu/event/556 

Hybrid MPI/OpenMP programming, 13-14 décembre, Idris, Orsay, France
Détails et inscriptions: https://events.prace-ri.eu/event/555 

You can find all the courses offered by the PATCs at http://events.prace-ri.eu/categoryDisplay.py?categId=2 
and further info about Maison de la Simulation at http://www.maisondelasimulation.fr/Phocea/Page/index.php?id=71 
If you have specific enquiries please contact patc@maisondelasimulation.fr 

Best regards
Michel Kern, coordinator for PATC France

--

Michel Kern
Centre de Recherche Inria de Paris,    Maison de la Simulation
2 rue Simone Iff, bureau A413,            Digiteo Labs, bât 565, CEA Saclay 
75012 Paris                                          91191 Gif-sur-Yvette cedex 
tel. : +33 (0)1 80 49 42 36,                 tel. : +33 (0)1 69 08 58 32            



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Saturday 24 September 2016

Call for Papers: ICESS2016 and ICIA2016 - Japan

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CALL FOR PAPERS AND PARTICIPATION

Conference Dates: November 14-16, 2016
Venue: Kagawa University, Takamatsu, Japan

=====================================

The Second International Conference on Electronics and Software Science (ICESS2016)

URL: http://sdiwc.net/conferences/second-international-conference-on-electronics-and-software-science/
EMAIL: icess16@sdiwc.net

The conference welcome papers on the following (but not limited to) research topics:
- Advanced Power System and Control System
- Automobile Engineering
- Communication
- Control and Robotics
- e-Healthcare System
- Ergonomics and Application
- Feedback Control Systems
- Broad Band Communication
- Computer and Intelligent Communication
- Disaster Prevention Engineering
- Electromagnetics and Photonics
- Expert Systems and Artificial Intelligence Techniques

=====================================

The Fifth International Conference on Informatics and Applications (ICIA2016)

URL: http://sdiwc.net/conferences/fifth-international-conference-informatics-applications/
EMAIL: icia16@sdiwc.net

The conference welcome papers on the following (but not limited to) research topics:
- Access Controls
- Assurance of Service
- Cloud Computing
- Computer Crime Prevention and Detection
- Computer Security
- Critical Computing and Storage
- Anti-cyberterrorism
- Biometrics Technologies
- Computational Intelligence
- Computer Forensics
- Confidentiality Protection
- Critical Infrastructure Management
- Data Compression
- Data Mining

=====================================

DEADLINE of SUBMISSION: October 7, 2016

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Call for Papers - COSMIC 2017

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===============================================================================
                                CALL FOR PAPERS 

  COSMIC: international workshop on Code OptimiSation for MultI and many Cores 

                           held in conjunction with the 
     International Symposium on Code Generation and Optimization (CGO) 2017

  Website: http://workshops.inf.ed.ac.uk/cosmic/cosmic17

                      Austin, TX – February 4 or 5, 2017
===============================================================================

Many-core architectures, such as mobile SOCs, GPGPUs, and deep learning
accelerators, are quickly becoming the norm in computing devices and consumer
electronics. The community sees this development as an essential step in
sustaining the exponential growth of performance in an energy efficient way,
but at present there is no consensus on how software can make best use of it.
Developing parallel applications often starts with an existing sequential
implementation. A key problem is how to discover the parallelism potentially
available and then convert it into a form that can be exploited we have
a parallel implementation, its performance and energy efficiency largely
depend on how it is mapped to the available hardware. Given that hardware is
increasingly diverse and heterogeneous, and that in the era of dark silicon
energy efficiency affects the availability of hardware, how can this
re-mapping be best achieved. Solutions to these two problems form the core
topic of COSMIC'17. Research papers on innovative techniques and experience
papers on insights obtained by experimenting with real-world systems and
applications are both welcome.

===Topic of Interest===
This workshop aims at examining different solutions to these problems and
includes (but is not limited to):

- programming languages and models 
- compilers and tools 
- runtime systems 
- operating systems 
- binary translation 
- combinations of the above 

for homogeneous, heterogeneous multi-core and many-core based systems. 

Regular research papers and work-in-progress short papers are welcome. 

===Important Dates===
Submission: November 27, 2016 – Anywhere on Earth
Author Notification: December 20, 2016
Workshop: February 4 or 5, 2017

===Organizers===
Pavlos Petoumenos, The University of Edinburgh, UK
Volker Seeker, Lancaster University, UK
Zheng Wang, Lancaster University, UK
Hugh Leather, The University of Edinburgh, UK

===Program Committee===
Bruno Bodin, University of Edinburgh, UK
Huimin Cui, ICT, Chinese Academy of Sciences, China
Murali Krishna Emani, Lawrence Livermore, USA
Jianbing Fang, NUDT, China
Peter Garraghan, Lancaster University, UK
Xing Liu, IBM TJ Watson, USA
Christos Margiolas, Intel, USA
Xavier Martorell, Universitat Politecnica de Catalunya (UPC), Spain
Geraint North, ARM, UK
Ozcan Ozturk, Bilkent University, Turkey
Jeremy Singer, Glasgow University, UK
Chronis Xekalakis, NVIDIA, USA
-- 
Pavlos Petoumenos
Research Associate
School of Informatics
The University of Edinburgh

Informatics Forum 1.02
10 Crichton Street
Edinburgh, EH8 9AB
Scotland, UK 

The University of Edinburgh is a charitable body, registered in
Scotland, with registration number SC005336.

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Friday 23 September 2016

Seventh Annual Energy Efficient HPC Working Group Workshop

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CALL FOR PARTICIPATION
======================

Seventh Annual SC16 Energy Efficient HPC Working Group Workshop will be held as part of SC16, the International Conference for High Performance Computing, Networking, Storage and Analysis.  


Sunday, November 13th  
9:00a.m. to 5:30p.m.
Salt Lake City, Utah USA

PLEASE PLAN YOUR TRAVEL ACCORDINGLY.  This is a Sunday workshop, you will probably need to arrive in Salt Lake City on Saturday in order to arrive in time to go through badging and get to the workshop by 9AM.

The keynote speaker for the workshop will be Thomas Schulthess, director of the Swiss National Supercomputing Centre (also known as CSCS). 

The agenda for the workshop includes the following invited talks:

§  Future-proofing your HPC Data Center design

§  Energy-efficiency economics

§  Architectural roadmap and impacts

§  System software: Controlling energy across the stack

There will be lunch-time discussion groups, topics include.  

§  Power API/Redfish/GEO

§  Liquid Cooling Standards

§  Energy and Power Aware Job Scheduling and Resource Management


ABSTRACT:  This annual workshop is organized by the Energy Efficient HPC Working Group (http://eehpcwg.lbl.gov/). It provides a strong blended focus that includes both the facilities and system perspectives; from architecture through design and implementation. The topics reflect the activities and interests of the EE HPC WG, which is a group with over 600 members from ~20 different countries. It provides a mix between instructional presentations and talks about recent advances. This workshop is unique in that it provides a forum for sharing best practices of major supercomputing centers from around the world. Discussion and audience participation is encouraged. There are presentations, panels and discussions instead of papers and posters. Presenters are mostly from major governmental and academic supercomputing centers. The panels encourage discussion around more controversial topics and include panelists from supercomputing centers, academic institutions as well as the vendor community. 

WORKSHOP ORGANIZERS:
Michael Patterson, Intel Corporation
Torsten Wilde, Leibniz Supercomputing Centre
Natalie Bates, Energy Efficient HPC Working Group
Stephen Poole, US Department of Defense
Daniel Hackenberg, Technical University Dresden
Thomas Durbin, University of Illinois
Steve Martin, Cray Inc.
Dale Sartor, Lawrence Berkeley National Laboratory
Anna Maria Bailey, Lawrence Livermore National Laboratory
Ramkumar Nagappan, Intel Corporation
Nicolas Dube, Hewlett Packard Enterprise
Andres Marquez, Pacific Northwest National Laboratory
David Grant, Oak Ridge National Laboratory
Josip Loncaric, Los Alamos National Laboratory
James H. Laros, Sandia National Laboratory
David J. Martinez, Sandia National Laboratory
Susan Coghlan, Argonne National Laboratory
James H. Rogers, Oak Ridge National Laboratory
Toshio Endo, Tokyo Institute of Technology
Fumiyoshi Shoji, RIKEN
Francois Robin, CEA-DAM
Caleb Phillips, National Renewable Energy Laboratory
--
Natalie Bates
Energy Efficient HPC Working Group

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CFP: 2016 Workshop on Accelerator-Enabled Algorithms and Applications in Bioinformatics (WACEBI 2016)

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2016 Workshop on Accelerator-Enabled Algorithms and Applications in Bioinformatics (WACEBI 2016)
in conjunction with IEEE BIBM 2016, Shenzhen, China, December 15-18, 2016

Call for Papers:
Advances in high-throughput technologies (such as cost-affordable sequencing of whole genomes, population-scale variation screening, or mass spectrometry-based proteomics) are continually propelling related bioinformatics research into the era of big data. This establishes a strong need of sophisticated parallel algorithms and architectures for fast and efficient processing of large-scale biological datasets. To address these challenges, diverse accelerators have been used to accelerate important and computationally demanding applications in Bioinformatics. Typical accelerators include but not limited to FPGAs, GPUs, Intel Xeon Phi coprocessors, Intel SSE and AVX vector processing units, Micron Automata Processors, and custom hardware chips. Meanwhile, various parallel algorithms inherently enabling to use accelerators have been or are being developed as well.

This workshop focuses on accelerator-enabled parallel algorithms and applications in Bioinformatics, and will award a Best GPU Paper Award to an outstanding paper based on GPU computing. This Best GPU Paper Award is generously sponsored by NVIDIA Corporation and the prize is one GeForce GTX Titan X graphics card (state-of-the-art GPU and worth of $1000). We will consider original submissions that (1) use accelerator technologies to address important biological problems, or (2) propose new parallel algorithms and software tools elaborated to have the potential and feasibility to exploit accelerators. Topics of interest include but are not limited to:
  (1) Biological sequence database
  (2) Biological sequence analysis
  (3) Computational genomics and proteomics
  (4) Infrastructure and systems tools for high-performance bioinformatics
  (5) Metagenomics
  (6) Next-generation sequencing
  (7) Phylogeny inference
  (8) Protein structure prediction and modeling
  (9) Workflow and systems for big biological data management

The WACEBI 2016 workshop will be held in conjunction with the IEEE International Conference on Bioinformatics and Biomedicine 2016 (IEEE BIBM 2016), Shenzhen, China, Dec. 15-18, 2016.

Online Submission
Please submit a full-length paper (up to 8 pages IEEE 2-column format) through the online submission system (you can download the format instruction from here). Electronic submissions (in PDF or Postscript format) are required. Accepted papers by this workshop will be published by the IEEE Computer Society. In addition, we plan to publish selected papers (with technically significant expansion and revision) as a special issue in some highly respected journal.

Important Dates
August 23, 2016: Paper submission open
October 09, 2016: Due date for full workshop papers submission
November 10, 2016: Notification of paper acceptance to authors
November 20, 2016: Camera-ready of accepted papers
December 15, 2016: Workshop

Program Chairs
Yongchao Liu (Georgia Institute of Technology, USA)
Bertil Schmidt (University of Mainz, Germany)

Program Committee Members
Sunita Chandrasekaran (University of Delaware, USA)
Scott Emrich (University of Notre Dame, USA)
Jorge Gonzalez-Dominguez (University of A Coruna, Spain)
Andreas Hildebrandt (University of Mainz, Germany)
Ananth Kalyanaraman (Washington State University, USA)
Ben Langmead (Johns Hopkins University, USA)
Dominique Lavenier (INRIA/IRISA, France)
Tao Li (Nankai University, China)
Weiguo Liu (Shandong University, China)
Ruibang Luo (UJohns Hopkins University, USA)
Jan Schroeder (Walter and Eliza Hall Institute of Medical Research, Australia)
Sharma Thankachan (Georgia Institute of Technology, USA)
Gang Wang (Nankai University, China)
Jaroslaw Zola (The State University of New York at Buffalo, USA)

Contact
Yongchao Liu (yliu@cc.gatech.edu)
Bertil Schmidt (bertil.schmidt@uni-mainz.de)
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Monday 12 September 2016

CFP: 35th IPCCC 2016 Workshop on Communication, Computing, and Networking in Cyber Physical Systems

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The First International Workshop on Communication, Computing, and Networking in Cyber Physical Systems (CCN-CPS)

https://sites.google.com/site/ccncps/

in association with

35th IEEE International Performance Computing and Communications Conference (IPCCC 2016)

Las Vegas, Nevada, USA, December 9-11, 2016

http://www.ipccc.org/


The new paradigms and tremendous advances in computing, communications and control have provided and supported wide range of applications in all domains of live, in particular, bridging the physical components and the cyber space leading to the Cyber Physical Systems (CPS). The notion of CPS is to use recent computing, communication, and control methods to design and operate intelligent and autonomous systems that can provide using cutting edge technologies. This require the use of computing resources for sensing, processing, analysis, predicting, understanding of data, and then communication resources for interaction, intervene, and interface management, and finally provide control for systems so that they can inter-operate, evolve, and run in a stable evidence-based environment. CPS has extraordinary significance for the future of several industrial domains and hence, it is expected that the complexity in CPS will continue to increase due to the integration of cyber components with physical and industrial systems.


This workshop solicits unpublished research work related to the latest challenges, technologies, solutions, techniques and fundamentals pertaining to communication, computing, networking, control in CPS.

Topics of the track consist of all aspects related to Communication, Computing, and Networking in CPS. They include but are not limited to:


·       Cyber-physical issues in next-generation communication systems

·       Real-time Sensing, Reasoning and Adaptation for Cyber-Physical Systems

·       Cloud-integrated Cyber-Physical Systems.

·       Evolutionary computing for CPS.

·       Design Theory for Cyber-Physical Systems

·       Cyber-Physical Systems Security and Privacy

·       Computation Models for Cyber-Physical Systems

·       Addresses computation issues in CPS

·       Verification and Formal Methods for Cyber-Physical Systems

·       Mobile Sensors in Cyber-Physical Systems

·       Design and Performance Optimization in Cyber-Physical Systems

·       Adaptive Control in Cyber-Physical Systems

·       Distributed computing for CPS.

·       Autonomous systems and UAVs.

·       Communication and Networking for Cyber-Physical Systems

·       Applications of CPS in eHealth, life sciences, energy, smart cities.

·       Optimizing computing and communication resources for CPS

·       Safety-critical, dependable, fault-tolerant cyber-physical systems.

·       Distributed, highly networked architectures for interconnected CPS

·       Communication and Infotainment Systems in CPS such as vehicles

·       Networking for intelligent mobility and transport infrastructures

·       Sensor networks for cyber-physical systems

·       Intelligent and collaborative methods for CPS

·       Simulation and visualization of CPS.

·       Testing and Validation of CPS.


Submission Instructions

Submitted papers must be neither previously published nor under review by another workshop, conference or journal. Only electronic submissions in PDF will be accepted. Submitted regular papers must be written in English, must be no longer than 6 pages in 10-point font, must render without error using standard PDF viewing tools, must print on US-Letter-sized paper, and must include the author names and affiliations in the first page. An extra page is allowed with 100$ extra registration fees. Submitted manuscripts may not exceed six (6) single-spaced double-column pages using 10-point size font on 8.5x11 inch pages (IEEE IPCCC conference style), including figures, tables, and references. See style templates for details: IEEE Manuscript Templates for Conference Proceedings

The authors of regular papers will deliver oral presentations. The authors of demo and poster papers will deliver system demonstrations and poster presentations, respectively. All accepted papers will be published by in IEEE IPCCC proceedings and indexed by IEEExplore.

All paper will submitted using EDAS system: https://edas.info/newPaper.php?c=22920

Important Dates

- Paper Submission Deadline: September 25, 2016

- Notification of Acceptance: October 31, 2016

- Final paper and Author Registration: November 12, 2016.



IEEE IPCCC-CCNCPS 2016 Chairs.





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IEEE HiPC 2016 (Hyderabad 19-22 December) - Call for Papers: Student Research Symposium

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IEEE HiPC 2016 (Hyderabad • 19-22 December) 

- CALL FOR PAPERS: Student Research Symposium

------------------------------------------------------------------------------------------------
23rd IEEE International Conference on
High Performance Computing, Data, and Analytics
HiPC 2016
December 19-22, 2016
Hyderabad International Conference Centre
Hyderabad, India
------------------------------------------------------------------------------------------------
****HiPC 2016 Student Research Symposium (SRS): Call for Papers****
------------------------------------------------------------------------------------------------
•September 16th .....SRS Submission Deadline
•November 1st .........SRS Accept/Reject Decision Notification
------------------------------------------------------------------------------------------------
The 9th Student Research Symposium on High Performance Computing, Data, and Analytics (SRS) is aimed at stimulating and fostering student research, and providing an international forum to highlight student research accomplishments in HPC. The symposium will also give students exposure to the best practices of senior HPC researchers in academia and industry. In a departure from previous years, the symposium will feature only student posters - there will be no talks by students - and the posters will be on display on the second and third days of the conference, allowing students to attend workshops on the first day. Awards for Best Poster will be presented at the conference, and an online book containing the resumes of the students participating in the symposium will be compiled and made available to the sponsors of the HiPC 2016 conference. See the SRS Call for Papers page at http://www.hipc.org/hipc2016/studentsymposium.php

------------------------------------------------------------------------------------------------
****HiPC 2016: Keeping pace with new computing trends!****
------------------------------------------------------------------------------------------------
In 2016, HiPC will continue to serve as a forum for researchers from around the world to present their current research efforts and findings and will act as a venue for stimulating discussions and highlighting work in Asia based on the expanded topic areas of high performance computing, data and analytics. The conference has a history of attracting participation from reputed researchers from all over the world and receives strong industry support from companies operating globally and also established in India. In addition to the two days of industry exhibits, the sponsoring partners to the conference hold industry symposiums to bring together providers and users of HPC in a forum for presenting state-of-the-art in HPC platforms and technologies, for discussing best practices, and for exchanging experiences.

------------------------------------------------
HiPC 2016 ORGANIZATION
------------------------------------------------
General Co-Chairs: 
Kalyana Chandalavada, Intel, USA
Ananth S.Narayan, Intel, India 

Steering Committee Chair: 
Viktor K. Prasanna, University of Southern California, USA

Vice General Chairs:
Chiranjib Sur, Shell, India
Yinglong Xia, Huawei Research America, USA

Program Chair:
Anne Benoit, ENS Lyon, France

Industry Liaison Co-Chairs:
Rama Govindaraju, Google, USA
Jigar Halani, Wipro, India

Workshops Co-Chairs:
Manish Parashar, Rutgers University, USA
Chiranjib Sur, Shell, India

Student Research Symposium Co-Chairs:
Kishore Kothapalli, IIIT-Hyderabad, India
Ashok Srinivasan, Florida State University, USA

Industry, Research, and User Symposium Co-Chairs:
R. Badrinath, Ericcson, India
Seetha Rama Krishna Nookala, Intel, India

Publicity Chair:
Anand Panangadan, California State University, Fullerton, USA

------------------------------------------------
HiPC 2016 SPONSORSHIP
------------------------------------------------
HiPC 2016 is co-sponsored by
•IEEE Computer Society Technical Committee on Parallel Processing (TCPP)
•HiPC Education Trust, India

In cooperation with
•ACM Special Interest Group on Algorithms and Computation Theory (SIGACT)
•ACM Special Interest Group on Computer Architecture (SIGARCH)
•FIP Working Group on Concurrent Systems
•Manufacturers' Association for Information Technology (MAIT)
•National Association of Software and Service Companies (NASSCOM)


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Call for participation SBAC-PAD 2016 (early registration until September 30)

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                                           CALL FOR PARTICIPATION

              The 28th International Symposium on  Computer Architecture
                       and High Performance Computing  (SBAC PAD 2016)

                                      http://www2.sbc.org.br/sbac/2016/index.html

                                                Los Angeles, Oct. 26-28, 2016


                                        Early registration  until  September 30

Keynotes and Speaker:

DAVID PADUA (UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN, USA)

KATHERINE YELICK (LAWRENCE BERKELEY NATIONAL LABORATORY AND UNIVERSITY OF CALIFORNIA, BERKELEY, USA)

TOM CONTE (GEORGIA TECH, USA)

JESUS LABARTA (TECHNICAL UNIVERSITY OF CATALONIA AND BARCELONA  SUPERCOMPUTING CENTER, SPAIN)

 A detailed program can be viewed at
http://www2.sbc.org.br/sbac/2016/program.html

Parallel Events

MPP2016 http://mpp2016.ime.uerj.br/

WAMCA 2016 http://www.cos.ufrj.br/wamca/index.php

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Tuesday 6 September 2016

CfP: Special Session on On-Chip Parallel and Network-Based Systems (OCPNBS) in PDP-17

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Special Session on On-Chip Parallel and Network-Based Systems (OCPNBS)
in conjunction with 25th Euromicro PDP 2017,
To be held in St. Petersburg, March 6-8, 2017


General Scope
On-chip parallel and network-based system design to achieve functionality with low energy-speed product requires larger device count SoC design, multi block function design methodology, architectures and energy evaluation schemes. Such systems, which are emerging as the architecture of choice for future high performance processors, require high performance interconnects which are necessary to satisfy the data supply needs of all cores. This session is dedicated to research on on-chip communication technology, architecture, design methods and applications, bringing together scientists and engineers working on on-chip innovations from related research communities, including parallel computer architecture, networking, and embedded systems. Original papers describing new and previously unpublished results are solicited on all aspects of on-chip parallel and networked system technology. Topics of interest include, but are not limited to:

  • On-chip network architecture (topology, routing, arbitration, ...)
  • Network design for 3D stacked logic and memory
  • Processor allocation and scheduling in CMPs
  • Mapping of applications onto NoCs
  • NoC reliability issues
  • OS and compiler support for NoCs
  • Performance and power issues in NoCs
  • Metrics, benchmarks, and trace analysis for NoCs
  • Multi/many-core workload characterization and evaluation
  • Modeling and simulation of on-chip parallel and networked systems
  • Synthesis, verification, debug and test of SoCs
  • NoC support for memory and cache access
  • SoC and NoC design methodologies and tools
  • Network support for SoC quality of service
  • On-chip systems for FPGAs and structured ASICs
  • NoC support for CMP/MPSoCs
  • Floorplan-aware NoC architecture optimization
  • Application-specific NoC design
  • Networked SoC case studies
  • On-chip parallel programming models and tools
  • Reconfigurable SoCs and NoCs
  • Memory system design and optimizations for SoCs
  • Early reports on system prototypes details
  • SIMD parallel VLSI computing
  • I/O interconnects and support for SoCs
and other related topic


Proceeding and Special Issue
The accepted papers will be published in the IEEE Computer Society Press proceedings together with the proceedings of PDP 2017.

Paper Submissions: Prospective authors should submit a full paper not exceeding 8 pages (double-column, 10pt) to the OCPNBS Special Session through the EasyChair
conference submission system

Paper submission: 25 September 2016
Acceptance notification: 25 October 2016
Camera ready due: 20 November 2016
Conference: 6-8 March 201
7




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