Thursday, 25 December 2014

PLC 2015 Workshop co-located with IPDPS 2015

CALL FOR PAPERS
2015 PLC Workshop
Programming Models, Languages and Compilers for Manycore and Heterogeneous Architectures

http://web.cs.uh.edu/~hpctools/plc2015/

May 25, 2015 - Hyderabad, India 


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Co-located with 29th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2015)


Three essential pillars to successful parallel computing - Productivity, Portability, Performance. Creating software for heterogeneous systems can be quite complex especially when the low-level details need to be managed and abstracted from the programmer. Emerging standards are providing an incremental development to target heterogeneous architectures, be it NVIDIA, ARM, Intel or AMD. We all know software is an expensive investment. Portability is necessary, ensuring long lifetime of the software and thus reducing the maintenance cost. Other challenges include locality and memory issues, load balancing, hiding latency with concurrency and so on.
This workshop aims to brainstorm ways to make programming heterogeneous systems less challenging and more interesting. We believe that this workshop will provide a forum for the presentation and discussions of research on all aspects of heterogeneous systems programming models, compiler optimizations, language extensions, and software tools for such systems.
Areas of interest include but are not limited to the following topics:
    •    Multicore processors, Heterogeneous systems, Accelerators
    •    Programming models: thread and task based models, data parallel models, stream programming
    •    Programming environments for heterogeneous systems
    ◦    OpenMP for Accelerator
    ◦    OpenACC
    ◦    OpenCL/CUDA
    ◦    OpenHMPP and other related models
    •    Compiler optimizations and tuning heterogeneous systems
    ◦    Parallelization and loop transformations
    ◦    Locality optimizations
    ◦    SIMDization/Vectorization
    ◦    Reducing synchronization and scheduling overheads on heterogeneous systems
    ◦    Tiling, parametric tiling and offloading
    •    Runtime systems for multicore processors, heterogeneous systems, accelerators
    •    Debuggers, and performance analysis tools for heterogeneous system and accelerators
    •    Application and Benchmarks

IMPORTANT DATES

Paper Submission Deadline: January 12th, 2015
Paper Acceptance Notification: February 13th, 2015
Camera Ready Due: February 28th, 2015
Workshop Date: May 25th, 2015

PAPER SUBMISSION AND PUBLICATION

Papers should present original research and should provide sufficient background material to make them accessible to the broader community.

Submitted manuscripts may not exceed ten (10) single-spaced double-column pages using 10-point size font on 8.5x11 inch pages (IEEE conference style), including figures, tables, and references (Please check IPDPS Call for Papers for more details). All papers will be peer-reviewed.The complete symposium and workshop proceedings will be published and available in the IEEE Digital Library.

Papers should be submitted electronically through the workshop web site at easychair: EasyChair for PLC15

Organization Committee

General Chair: 
    •    Barbara Chapman, University of Houston, US

Steering Committee: 
    •    Guang R. Gao, University of Delaware, US
    •    Xinmin Tian, Intel, US
    •    Wenguang Chen, Tsinghua University, China
    •    Michael Wong, IBM, Canada
    •   
Program Chair and Co-Chair(s): 
    •    Sunita Chandrasekaran, University of Houston, US
    •    TBA

Program committee: 
    •    Dhananjay M. Dhamdhere, IIT Powai, India
    •    Matthias Muller, TU Dresden, Germany
    •    Kamesh Madduri, Pennsylvania State University, US
    •    Piotr Luszczek, University of Knoxville, Tennessee, US
    •    Henry Jin, NASA, US
    •    Barry Rountree, Lawrence Livermore National Laboratory, US
    •    Stephen Olivier, Sandia National Laboratories, US
    •    Jeff Hammond, Intel, US
    •    Dounia Khaldi, University of Houston, US
    •    Dharanipragada Janakiram, IIT, Madras, India
    •    Mahantesh M Halappanavar, Pacific Northwest National Laboratory, US
    •    John Lidel, Micron, US
    •    James Beyer, Cray Inc, US
    •    Yuan Lin, NVIDIA, US
    •    Guido Juckeland, TU Dresden, Germany
    •    Seeyong Lee, Oak Ridge National Laboratory, US
    •    Yin Lu, Texas Tech University, US
    •    Kishore Kothapalli, IIIT, Hyderabad, India
       
Publicity Chair:
    •    Rezaul Karim Raju, University of Houston, US

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