Call for Papers
2nd Workshop on High-performance and Real-Time Embedded Systems (HiRES 2014)
<http://www.cister.isep.ipp.
http://www.cister.isep.ipp.pt/
==============================
To be held in conjunction with the 9th International Conference on
High-Performance and Embedded Architectures and Compilers (HiPEAC 2014)
January 20, 2014, Vienna, Austria
Goal of the Workshop
--------------------
Increasingly, time is a relevant concern which impacts in all application
areas and challenges ahead. Real-time requirements can be found in
applications ranging from large-scale data processing systems to deeply
embedded devices. Examples include safety-critical systems with
high-performance requirements, such as collision avoidance and autonomous
driving in avionics and automotive respectively, in which the correct timing
behaviour is of paramount importance; consumer systems, such as video
processing in TV sets and games; or real-time complex event processing
applications, such as online trading or real-time traffic management.
In all these applications, systems are expected to cope with an increasing
demand of functional and non-functional requirements, with the corresponding
increase in processing capabilities, paving the way for high-performance
architectures, of which multi-core and many-core systems are becoming
pervasive. The capabilities and challenges of parallelization as a means to
provide higher performance is a cross-cutting concern.
This workshop intends to bring together researchers and engineers in the
confluence of high-performance, embedded systems and real-time systems. The
goal is to allow for fruitful discussions on the challenges and research
directions that should be tackled by the community. Papers are invited to
illustrate current and future work in the theory and practice of the design
and engineering of high-performance real-time embedded systems for a variety
of application domains.
Topics of interest
------------------
Topics of interest to this edition of the workshop include but are not
limited to:
- Runtimes and operating systems combining high-performance and
predictability requirements;
- Programming models and compiler support for providing real-time
capabilities to multi- and many-core architectures;
- Models and tools for code generation, system verification and validation;
- Worst-case execution time analysis, parallel/dag-based task models,
schedulability analysis of multi- and many-core systems;
- Heterogeneous multi-core embedded real-time architectures, many-core
accelerators;
- Time-predictable multi- and many-core processor architectures;
- Time-aware energy-efficiency.
Paper submission
----------------
Submitted papers should use the LNCS format and should be 12 pages maximum.
Submissions will be handled through easychair.
Authors of accepted papers will be invited to submit an extended version to
a forthcoming special issue of the Elsevier Journal of Systems Architecture
(JSA) on the topic of High-performance and Real-time Embedded Systems.
Important dates
---------------
Submission deadline: Abstract registration - October 18, 2013
Paper submission - October 25, 2013
Notification to authors: November 23, 2013
Final version of accepted papers: December 9, 2013
Organizers
----------
Lu?s Miguel Pinho, CISTER, Portugal
Eduardo Qui?ones, BSC, Spain
Sascha Uhrig, TU Dortmund, Germany
Program committee
-----------------
Albert Cohen, INRIA, France
Alejandro Alonso, Universidad Polit?cnica de Madrid, Spain Eduardo Qui?ones,
BSC, Spain Enric Herrero, Intel Labs Barcelona, Spain Jan Reineke, Univ. of
Saarbruecken, Germany Johan Eker, Ericsson, Sweden Lu?s Miguel Pinho,
CISTER, Portugal Marko Bertogna, University of Modena, Italy Martin
Schoeberl, DTU, Denmark Mats Brorsson, KTH, Sweden Neil Audsley, University
of York, UK Philippe Bonnot, Thales, France Sascha Uhrig, TU Dortmund,
Germany Theo Ungerer, University of Augsburg, Germany Tommaso Cucinotta,
Bell Laboratories, Ireland Zlatko Petrov, Honeywell, Czech Republic
--
Dr. Eduardo Qui?ones, Researcher at BSC
<http://people.ac.upc.edu/
+34 934 137 172
2nd Workshop on High-performance and Real-Time Embedded Systems (HiRES 2014)
<http://www.cister.isep.ipp.
http://www.cister.isep.ipp.pt/
==============================
To be held in conjunction with the 9th International Conference on
High-Performance and Embedded Architectures and Compilers (HiPEAC 2014)
January 20, 2014, Vienna, Austria
Goal of the Workshop
--------------------
Increasingly, time is a relevant concern which impacts in all application
areas and challenges ahead. Real-time requirements can be found in
applications ranging from large-scale data processing systems to deeply
embedded devices. Examples include safety-critical systems with
high-performance requirements, such as collision avoidance and autonomous
driving in avionics and automotive respectively, in which the correct timing
behaviour is of paramount importance; consumer systems, such as video
processing in TV sets and games; or real-time complex event processing
applications, such as online trading or real-time traffic management.
In all these applications, systems are expected to cope with an increasing
demand of functional and non-functional requirements, with the corresponding
increase in processing capabilities, paving the way for high-performance
architectures, of which multi-core and many-core systems are becoming
pervasive. The capabilities and challenges of parallelization as a means to
provide higher performance is a cross-cutting concern.
This workshop intends to bring together researchers and engineers in the
confluence of high-performance, embedded systems and real-time systems. The
goal is to allow for fruitful discussions on the challenges and research
directions that should be tackled by the community. Papers are invited to
illustrate current and future work in the theory and practice of the design
and engineering of high-performance real-time embedded systems for a variety
of application domains.
Topics of interest
------------------
Topics of interest to this edition of the workshop include but are not
limited to:
- Runtimes and operating systems combining high-performance and
predictability requirements;
- Programming models and compiler support for providing real-time
capabilities to multi- and many-core architectures;
- Models and tools for code generation, system verification and validation;
- Worst-case execution time analysis, parallel/dag-based task models,
schedulability analysis of multi- and many-core systems;
- Heterogeneous multi-core embedded real-time architectures, many-core
accelerators;
- Time-predictable multi- and many-core processor architectures;
- Time-aware energy-efficiency.
Paper submission
----------------
Submitted papers should use the LNCS format and should be 12 pages maximum.
Submissions will be handled through easychair.
Authors of accepted papers will be invited to submit an extended version to
a forthcoming special issue of the Elsevier Journal of Systems Architecture
(JSA) on the topic of High-performance and Real-time Embedded Systems.
Important dates
---------------
Submission deadline: Abstract registration - October 18, 2013
Paper submission - October 25, 2013
Notification to authors: November 23, 2013
Final version of accepted papers: December 9, 2013
Organizers
----------
Lu?s Miguel Pinho, CISTER, Portugal
Eduardo Qui?ones, BSC, Spain
Sascha Uhrig, TU Dortmund, Germany
Program committee
-----------------
Albert Cohen, INRIA, France
Alejandro Alonso, Universidad Polit?cnica de Madrid, Spain Eduardo Qui?ones,
BSC, Spain Enric Herrero, Intel Labs Barcelona, Spain Jan Reineke, Univ. of
Saarbruecken, Germany Johan Eker, Ericsson, Sweden Lu?s Miguel Pinho,
CISTER, Portugal Marko Bertogna, University of Modena, Italy Martin
Schoeberl, DTU, Denmark Mats Brorsson, KTH, Sweden Neil Audsley, University
of York, UK Philippe Bonnot, Thales, France Sascha Uhrig, TU Dortmund,
Germany Theo Ungerer, University of Augsburg, Germany Tommaso Cucinotta,
Bell Laboratories, Ireland Zlatko Petrov, Honeywell, Czech Republic
--
Dr. Eduardo Qui?ones, Researcher at BSC
<http://people.ac.upc.edu/
+34 934 137 172
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