Thursday, 6 March 2014

The FIRST ANNUAL WORKSHOP ON HETEROGENEOUS ARCHITECTURES: SOFTWARE AND HARDWARE (HASH)

The FIRST  ANNUAL WORKSHOP ON HETEROGENEOUS ARCHITECTURES:
           SOFTWARE AND HARDWARE  (HASH)

                June 14, 2014, Minneapolis, MN, USA
                    (co-located with ISCA 2014)

                         CALL FOR PAPERS

            https://sites.google.com/site/hashworkshop/
==================================================================

The architecture and microarchitecture of multicore/manycore
processors is moving rapidly toward heterogeneity. Heterogeneous
multicore/manycore processors provide a promising opportunity to
achieve better performance together with power efficiency. However,
the complexity of the architecture, microarchitecture, software
applications,  and system software presents a challenging problem. The
varying requirements of the different applications running on a single
machine, the changing behavior of a single application during its
lifetime,  as well as the ever-changing characteristics of
multiprogramming environment make the design and programming of
heterogeneous architectures a big challenge.

The Heterogeneous Architecture: Software and Hardware workshop
provides a high-quality forum for computer scientists and engineers to
present their latest research findings in the rapidly

evolving field of  heterogeneous architecture where the
heterogeneouity can be in the form of cores of different strength,
general purpose cores and GPUs, cores with different memory
hierarchies, accelerators, etc; as well as their interconnect. The
interaction among the different layers of the stack is part of the
objectives, which involves compilers, OS, and programming models.

KEY DATES
=========

Submissions deadline: March 10, 2014
Notification: April 10, 2014
Camera-Copy Papers Due: April 30, 2014

ORGANIZERS
============
Mohamed Zahran, (NYU)
Hubertus Franke (IBM T. J. Watson)

TOPICS OF INTEREST
==================

Topics of interest include, but are not limited to:

*Memory hierarchy for heterogeneous multicores
*Power efficiency of heterogeneous architectures
*Programming models for  heterogeneous architectures
* The effect of heterogeneity on NoC
* Compilation techniques for heterogeneous architectures
* GPGPUs
* Reliability issues in heterogeneous computing
* OS management of heterogeneous architecture


SUBMISSION
==========

The Program Committee invites authors to submit papers up to 8 pages
(11pt font) double-column describing original, unpublished recent
work, or work in progress related to the workshop theme.

Submission must be in pdf format and emailed to:

hash.workshop@gmail.com

PROGRAM COMMITTEE
===================

Trey Cain (Qualcomm)
John Cavazos (U. Delaware)
Aamer Jaleel (Intel)
Pierre Michaud (INRIA)
Vijay Janapa Reddi (UT Austin)
Aaron Smith (Microsoft Research)
Jessica Tseng (IBM Research)
Dong Ping Zhang (AMD)



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