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Call for Paper
Fourth ACM International Workshop on Many-core Embedded Systems (MES)
in conjunction with the 43rd International symposium on Computer Architecture (ISCA-2016)
June 19, 2016, Seoul, Korea
Special Issue:
Elsevier's Microprocessors and Microsystems Journal (MICPRO)
General Scope
Many-core embedded systems (MES) are moving towards the integration of hundreds of cores on a single chip and hold the promise of increasing performance
through parallelism. As the number of cores integrated into a chip increases, the on-chip communication becomes a power and performance bottleneck in future MESs. On-chip network has been proposed as the most viable solution to meet the performance and design
productivity requirements of the complex on-chip communication infrastructure. NoCs provide an infrastructure for better modularity, scalability, fault-tolerance, and higher bandwidth compared to traditional infrastructures. On the other hand, developing applications
using the full power of MES requires software developers to transition from writing serial programs to writing parallel programs. On top of that, contemporary Operating Systems (OS) have been designed to run on a small number of reliable cores and are not
able to scale up to hundreds of cores. Therefore, designing scalable and fault-tolerant OSs will be a tremendous challenge in future MESs.
As neuromorphic and mixed-signal architectures are emerging as an alternative solution beyond the conventional digital von Neumann machines for complex applications, we would like to highlight such emerging architectures in this workshop. In addition, we would like to emphasize on energy efficient (real-time) data processing in the realm of Big data and IoT applications through MESs.
The goal of this workshop is to bring together the researchers from academia and the experts from industry to present and discuss innovative ideas and solutions in the design, modeling, prototyping, programming, and implementation of MES. Topics of interest include, but are not limited to:
As neuromorphic and mixed-signal architectures are emerging as an alternative solution beyond the conventional digital von Neumann machines for complex applications, we would like to highlight such emerging architectures in this workshop. In addition, we would like to emphasize on energy efficient (real-time) data processing in the realm of Big data and IoT applications through MESs.
The goal of this workshop is to bring together the researchers from academia and the experts from industry to present and discuss innovative ideas and solutions in the design, modeling, prototyping, programming, and implementation of MES. Topics of interest include, but are not limited to:
- Networks/Systems-on-Chip
- Neuromorphic Architectures
- Applications mapping
- (Embedded) OS
- Real-time and mixed-criticality
- 3D Stacked Architectures
- Reliability issues
- Physical design
- Synthesis, verification, debug & test
- Performance and power issues
- Reconfigurability aspects
- FPGA implementation
- Parallel programming models and scalable software
- Compiler technologies
- Many-core as accelerators
- Heterogeneity challenges
- Big data and IoT applications
- Data-centers and supercomputers
- Dynamic power management and energy harvesting
Submissions should not exceed 8 pages, including tables and figures, and must be formatted in accordance to the ACM two column style. Submission of a paper should be regarded as
an undertaking whereby, should the paper be accepted, at least one of the authors will register for the conference and present the work.
Proceeding and Special Issue:
The accepted papers will be published in the
ACM Digital Library (confirmed).
Selected papers will be considered for the special issue of
Elsevier's Microprocessors and Microsystems (confirmed).
Instruction for Paper Submissions:
You are invited to submit original and unpublished research works on topics related to many-core embedded systems. Submitted papers
must not have been published or simultaneously submitted elsewhere. Please submit a PDF copy of your full manuscript, not to exceed 8 double-column ACM formatted pages, and include up to 6 keywords and an abstract of no more than 400 words. Papers must be
formatted in accordance to the ACM two column style. ACM Word or LaTeX style templates are available
here. In addition, Authors should apply
ACM Computing Classification categories and terms.
Submit a PDF copy of your full manuscript to the Workshop EasyChair link at:
Important Dates:
Submission deadline: March 15th
Notification of acceptance: April 25th
Camera ready: May 15th
Invitation for special issue: May 1st (tentative)
Organizers:
Masoud Daneshtalab (KTH, Sweden)
Maurizio Palesi (Kore University, Italy)
Program Chairs:
Masoumeh Ebrahimi (KTH, Sweden & UTU, Finland)
Diana Goehringer (Ruhr-University Bochum, Germany)
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