Sunday, 15 May 2016

CFP: FTS workshop @ IEEE Cluster 2016 (Deadline extended to July 7)

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Call for paper

Second International Workshop on Fault Tolerant Systems (FTS) September 16th.

To be held in conjunction with IEEE Cluster 2016, September 12-16 in Taiwan.


Fault Tolerance is a cross-cutting issue that spans all layers of the hardware/software stack, and hence, requires coupled improvements in each layer and co-design between the different layers. FTS aims at providing a venue for researchers to share experiences across the hardware/software layers and attendees to get a holistic view of fault tolerance techniques, especially with a focus on HPC and parallel computing.


The focus areas for this workshop include, but are not limited to:
  • Techniques for predicting, detecting, and correcting silent data corruption
  • Hardware failure prediction and recovery techniques
  • Novel hardware design for fault mitigation
  • Programming interfaces and libraries to facilitate resilience of parallel executions
  • Resilient algorithm design for application level fault tolerance
  • Failure modeling and analysis
  • Checkpoint/restart model
  • Replication model
  • Fault injection techniques for improved tool development
  • Hardware and software fault detection and reporting systems
  • Fault tolerance for coupled executions, workflows, and in situ data analytics
  • Algorithms for performance optimization in the presence of faults
  • Techniques and algorithms for rollback recovery


Proceedings of this workshop will be published in CD format and will be available at the conference (together with the IEEE Cluster conference proceedings). The accepted papers will be included in and indexed by the IEEE CS digital library.


Test best papers of FTS-2016 will be included in a special issue on Fault Tolerant Systems in an appropriate international journal.


Submissions should be in PDF format in U.S. Letter size paper. They should not exceed 8 pages (all inclusive). Authors with accepted papers may purchase additional up to 4 pages. Submissions should use the same formatting as IEEE Cluster (). Submissions will be judged based on relevance, significance, originality, correctness and clarity. Please visit workshop website at:

for the submission link.


Paper Submission:      May 1, 2016 (extended to July 7, 2016)
Author Notification:        June 1, 2016
Camera Ready:             August 1, 2016
Workshop Date:            September 16, 2016

  • Sheng Di, Argonne National Laboratory
  • Vaidy Sunderam, Emory University

  • Hong Zhang, Argonne National Laboratory

  • Pavan Balaji, Argonne National Laboratory
  • Franck Cappello, Argonne National Laboratory and University of Illinois Urbana-Chanpaign
  • Mattan Erez, University of Texas, Austin
  • Yves Robert, INRIA and University of Tennessee, Knoxville

  • Leonardo Bautista Gomez, Barcelona Supercomputing Center
  • Ana Gainaru, University of Illinois at Urbana-Champaign
  • Esteban Meneses, Costa Rica Institute of Technology
  • Sriram Krishnamoorthy, Pacific Northwest National Lab
  • Aurelien Bouteiller, University of Tennessee Knoxville
  • Qiang Guan, Los Alamos National Laboratory
  • Kento Sato, Lawrence Livermore National Laboratory
  • Raghunath Raja Chandrasekar, Cray Inc.
  • Catello Di Martino, Bell Labs Alcatel-Lucent
  • Devesh Tiwari, Oak Ridge National Laboratory 
  • Sanguine Seo, Argonne National Laboratory
  • Massimiliano Lupo Pasini, Emory University
  • Michael Mascagni, Florida State University/National Institute of Standards and Technology

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