International Workshop on
Programming Models, Languages and Compilers Workshop for Manycore and
Heterogeneous Architectures
(PLC 2014)
http://web.cs.uh.edu/~
Held in conjunction with the
28th International Parallel and Distributed Processing Symposium (IPDPS
2014)
Phoenix, Arizona, USA, May 20th, 2014
http://www.ipdps.org/
==============================
CALL FOR PAPERS PLC 2014
---------------
Three essential pillars to successful parallel computing - Productivity,
Portability, Performance. Creating software for heterogeneous systems can
be quite complex especially when the low-level details need to be managed
and abstracted from the programmer. Emerging standards are providing an
incremental development to target heterogeneous architectures, be it
NVIDIA, ARM, Intel or AMD. We all know software is an expensive investment.
Portability is necessary, ensuring long lifetime of the software and thus
reducing the maintenance cost. Other challenges include locality and memory
issues, load balancing, hiding latency with concurrency and so on.
This workshop aims to brainstorm ways to make programming
heterogeneous systems less challenging and more interesting. We believe
that this workshop will provide a forum for the presentation and
discussions of research on all aspects of heterogeneous systems programming
models, compiler optimizations, language extensions, and software tools for
such systems.
*Areas of interest include but are not limited to the following topics:*
- Multicore processors, Heterogeneous systems, Accelerators
- Programming models: thread and task based models, data parallel
models, stream programming
- Programming environments for heterogeneous systems
- OpenMP for Accelerator
- OpenACC
- OpenCL/CUDA
- OpenHMPP and other related models
- DSL
- Compiler optimizations and tuning heterogeneous systems
- Parallelization and loop transformations
- Locality optimizations
- SIMDization/Vectorization
- Reducing synchronization and scheduling overheads on heterogeneous
systems
- Tiling, parametric tiling and offloading
- Runtime systems for multicore processors, heterogeneous systems,
accelerators
- Debuggers, and performance analysis tools for heterogeneous system and
accelerators
- Application and Benchmarks
SUBMISSION GUIDELINES
---------------
Papers should present original research and should provide sufficient
background material to make them accessible to the broader community. In
addition, we solicit papers from practitioners describing problems and
experiences building software tools for Multicore processors and GPU
accelerators.
Full paper submissions should not exceed 10 pages in standard IEEE
conference format. Submissions can be made through this link
<http://edas.info/N15811>.
The proceedings of this workshop will be published electronically together
with with IPDPS proceedings via the IEEE Xplore Digital Library.
Selected papers will appear in the special issue of a Journal (TBD later).
*IMPORTANT DATES*
*---------------*
? *Paper Submission Deadline: Jan 14th, 2014 January 21st, 2014 *
? *Paper Acceptance Notification: Feb 28th, 2014*
? *Camera Ready Due: March 14th, 2014*
? *Workshop Date: May 20th, 2014*
ORGANIZERS
----------
*General Co-Chair:*
Barbara Chapman, University of Houston, US
*Steering Committee:*
Guang R. Gao, University of Delaware, US
Wenguang Chen, Tsinghua University, China
Michael Wong, IBM, US
*Program Co-Chair:*
Bronis R. De Supinski, LLNL, USA
Yonghong Yan (yanyh@cs.uh.edu), University of Houston, US
*Program committee*:
- Matthias Muller, TU Dresden, Germany
- Pavan Balaji, Argonne National Laboratory, US
- Sunita Chandrasekaran, University of Houston, US
- James Beyer, Cray Inc, US
- Yong Chen, Texas Tech University, US
- Karine Heydemann, University of Pierre et Marie Curie, France
- Xinmin Tian, Intel, US
- Eric Stotzer,TI, US
- Chunhua Liao, LLNL, US
- Yuan Lin, NVIDIA, US
- John Lidel, Cray, US
- Markus Levy, MCA, US
- Wu-chun Feng, Virginia Tech, US
- Stephen Olivier, Sandia National Laboratories, US
WEBSITE
-------
http://web.cs.uh.edu/~
CONTACT
-------
Please send any queries regarding the PLC workshop to sunita@cs.uh.edu
Programming Models, Languages and Compilers Workshop for Manycore and
Heterogeneous Architectures
(PLC 2014)
http://web.cs.uh.edu/~
Held in conjunction with the
28th International Parallel and Distributed Processing Symposium (IPDPS
2014)
Phoenix, Arizona, USA, May 20th, 2014
http://www.ipdps.org/
==============================
CALL FOR PAPERS PLC 2014
---------------
Three essential pillars to successful parallel computing - Productivity,
Portability, Performance. Creating software for heterogeneous systems can
be quite complex especially when the low-level details need to be managed
and abstracted from the programmer. Emerging standards are providing an
incremental development to target heterogeneous architectures, be it
NVIDIA, ARM, Intel or AMD. We all know software is an expensive investment.
Portability is necessary, ensuring long lifetime of the software and thus
reducing the maintenance cost. Other challenges include locality and memory
issues, load balancing, hiding latency with concurrency and so on.
This workshop aims to brainstorm ways to make programming
heterogeneous systems less challenging and more interesting. We believe
that this workshop will provide a forum for the presentation and
discussions of research on all aspects of heterogeneous systems programming
models, compiler optimizations, language extensions, and software tools for
such systems.
*Areas of interest include but are not limited to the following topics:*
- Multicore processors, Heterogeneous systems, Accelerators
- Programming models: thread and task based models, data parallel
models, stream programming
- Programming environments for heterogeneous systems
- OpenMP for Accelerator
- OpenACC
- OpenCL/CUDA
- OpenHMPP and other related models
- DSL
- Compiler optimizations and tuning heterogeneous systems
- Parallelization and loop transformations
- Locality optimizations
- SIMDization/Vectorization
- Reducing synchronization and scheduling overheads on heterogeneous
systems
- Tiling, parametric tiling and offloading
- Runtime systems for multicore processors, heterogeneous systems,
accelerators
- Debuggers, and performance analysis tools for heterogeneous system and
accelerators
- Application and Benchmarks
SUBMISSION GUIDELINES
---------------
Papers should present original research and should provide sufficient
background material to make them accessible to the broader community. In
addition, we solicit papers from practitioners describing problems and
experiences building software tools for Multicore processors and GPU
accelerators.
Full paper submissions should not exceed 10 pages in standard IEEE
conference format. Submissions can be made through this link
<http://edas.info/N15811>.
The proceedings of this workshop will be published electronically together
with with IPDPS proceedings via the IEEE Xplore Digital Library.
Selected papers will appear in the special issue of a Journal (TBD later).
*IMPORTANT DATES*
*---------------*
? *Paper Submission Deadline: Jan 14th, 2014 January 21st, 2014 *
? *Paper Acceptance Notification: Feb 28th, 2014*
? *Camera Ready Due: March 14th, 2014*
? *Workshop Date: May 20th, 2014*
ORGANIZERS
----------
*General Co-Chair:*
Barbara Chapman, University of Houston, US
*Steering Committee:*
Guang R. Gao, University of Delaware, US
Wenguang Chen, Tsinghua University, China
Michael Wong, IBM, US
*Program Co-Chair:*
Bronis R. De Supinski, LLNL, USA
Yonghong Yan (yanyh@cs.uh.edu), University of Houston, US
*Program committee*:
- Matthias Muller, TU Dresden, Germany
- Pavan Balaji, Argonne National Laboratory, US
- Sunita Chandrasekaran, University of Houston, US
- James Beyer, Cray Inc, US
- Yong Chen, Texas Tech University, US
- Karine Heydemann, University of Pierre et Marie Curie, France
- Xinmin Tian, Intel, US
- Eric Stotzer,TI, US
- Chunhua Liao, LLNL, US
- Yuan Lin, NVIDIA, US
- John Lidel, Cray, US
- Markus Levy, MCA, US
- Wu-chun Feng, Virginia Tech, US
- Stephen Olivier, Sandia National Laboratories, US
WEBSITE
-------
http://web.cs.uh.edu/~
CONTACT
-------
Please send any queries regarding the PLC workshop to sunita@cs.uh.edu
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