C A L L F O R P A P E R S*
First International Workshop on *FPGAs for Software Programmers* (FSP 2014)
http://www12.cs.fau.de/ws/
co-located with Int. Conf. on Field Programmable Logic and Applications (FPL)
September 1, 2014, Munich, Germany
Paper Submission Deadline: *Deadline Extension*: July 10, 2014
==============================
*Scope of the Workshop*
The aim of this workshop is to make FPGA and reconfigurable technology
accessible to software programmers. Despite their frequently proven power and
performance benefits, designing for FPGAs is mostly an engineering discipline
carried out by highly trained specialists. With recent progress in high-level
synthesis, a first important step towards bringing FPGA technology to
potentially millions of software developers was taken. However, to make this
happen, there are still important issues to be solved that are in the focus of
this workshop.
*Topics of the FSP Workshop include, but are not limited to*
o High-level synthesis and domain-specific languages (DSLs) for FPGAs and
heterogeneous systems
o Mapping approaches and tools for heterogeneous FPGAs
o Support of hard IP blocks such as embedded processors and memory interfaces
o Development environments for software engineers (automated tool flows, design
frameworks and tools, tool interaction)
o FPGA virtualization (design for portability, hardware abstraction, etc.)
o Design automation technologies for multi-FPGA and heterogeneous systems
o Methods for leveraging (partial) dynamic reconfiguration to increase
performance, flexibility, reliability, or programmability
o Operating system services for FPGA resource management, reliability, security
o Target hardware design platforms (infrastructure, drivers, portable systems)
o Overlays (CGRAs, vector processors, ASIP- and GPU-like intermediate fabrics)
o Applications (embedded computing, signal processing, bio informatics,
big data, database acceleration, etc.)
o Directions for collaborations (research proposals, networking, Horizon 2020)
*Important Dates*
Submission deadline: July 10, 2014
Notification of acceptance: July 31, 2014
Camera-ready final version: August 15, 2014
Workshop: September 1, 2014
*Submission details and publication*
Perspective authors are invited to submit original contributions (up to six
pages) or extended abstracts describing work-in-progress or position papers
(extended abstracts should not exceed two pages). Details about the submission
process are available on the workshop web page.
Accepted papers will be included in an ePrint proceedings volume with
Open Access. Every accepted paper must have at least one author registered to
the workshop by the time the camera-ready paper is due. In addition, selected
authors will be invited to contribute a chapter for a book project.
*General Co-Chairs*
- Frank Hannig, Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany
- Dirk Koch, University of Manchester, UK
- Daniel Ziener, Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany
*Program Committee*
- Hideharu Amano, Keio University, Japan
- Jason H. Anderson, University of Toronto, Canada
- Gordon Brebner, Xilinx Labs, UK
- João M. P. Cardoso, University of Porto, Portugal
- Jason Cong, University of California, Los Angeles, USA
- Andreas Koch, Technical University of Darmstadt, Germany
- Miriam Leeser, Northeastern University, USA
- Christian Plessl, University of Paderborn, Germany
- Dan Poznanovic, Cray Inc., USA
- Rodric Rabbah, IBM Research, USA
- Deshanand Singh, Altera, Canada
- Satnam Singh, Google, USA
- Dirk Stroobandt, Ghent University, Belgium
- Kazutoshi Wakabayashi, NEC Corp., Japan
- Markus Weinhardt, Osnabrück Univ. of Applied Sciences, Germany
First International Workshop on *FPGAs for Software Programmers* (FSP 2014)
http://www12.cs.fau.de/ws/
co-located with Int. Conf. on Field Programmable Logic and Applications (FPL)
September 1, 2014, Munich, Germany
Paper Submission Deadline: *Deadline Extension*: July 10, 2014
==============================
*Scope of the Workshop*
The aim of this workshop is to make FPGA and reconfigurable technology
accessible to software programmers. Despite their frequently proven power and
performance benefits, designing for FPGAs is mostly an engineering discipline
carried out by highly trained specialists. With recent progress in high-level
synthesis, a first important step towards bringing FPGA technology to
potentially millions of software developers was taken. However, to make this
happen, there are still important issues to be solved that are in the focus of
this workshop.
*Topics of the FSP Workshop include, but are not limited to*
o High-level synthesis and domain-specific languages (DSLs) for FPGAs and
heterogeneous systems
o Mapping approaches and tools for heterogeneous FPGAs
o Support of hard IP blocks such as embedded processors and memory interfaces
o Development environments for software engineers (automated tool flows, design
frameworks and tools, tool interaction)
o FPGA virtualization (design for portability, hardware abstraction, etc.)
o Design automation technologies for multi-FPGA and heterogeneous systems
o Methods for leveraging (partial) dynamic reconfiguration to increase
performance, flexibility, reliability, or programmability
o Operating system services for FPGA resource management, reliability, security
o Target hardware design platforms (infrastructure, drivers, portable systems)
o Overlays (CGRAs, vector processors, ASIP- and GPU-like intermediate fabrics)
o Applications (embedded computing, signal processing, bio informatics,
big data, database acceleration, etc.)
o Directions for collaborations (research proposals, networking, Horizon 2020)
*Important Dates*
Submission deadline: July 10, 2014
Notification of acceptance: July 31, 2014
Camera-ready final version: August 15, 2014
Workshop: September 1, 2014
*Submission details and publication*
Perspective authors are invited to submit original contributions (up to six
pages) or extended abstracts describing work-in-progress or position papers
(extended abstracts should not exceed two pages). Details about the submission
process are available on the workshop web page.
Accepted papers will be included in an ePrint proceedings volume with
Open Access. Every accepted paper must have at least one author registered to
the workshop by the time the camera-ready paper is due. In addition, selected
authors will be invited to contribute a chapter for a book project.
*General Co-Chairs*
- Frank Hannig, Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany
- Dirk Koch, University of Manchester, UK
- Daniel Ziener, Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany
*Program Committee*
- Hideharu Amano, Keio University, Japan
- Jason H. Anderson, University of Toronto, Canada
- Gordon Brebner, Xilinx Labs, UK
- João M. P. Cardoso, University of Porto, Portugal
- Jason Cong, University of California, Los Angeles, USA
- Andreas Koch, Technical University of Darmstadt, Germany
- Miriam Leeser, Northeastern University, USA
- Christian Plessl, University of Paderborn, Germany
- Dan Poznanovic, Cray Inc., USA
- Rodric Rabbah, IBM Research, USA
- Deshanand Singh, Altera, Canada
- Satnam Singh, Google, USA
- Dirk Stroobandt, Ghent University, Belgium
- Kazutoshi Wakabayashi, NEC Corp., Japan
- Markus Weinhardt, Osnabrück Univ. of Applied Sciences, Germany
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