Call for Papers - ARCS 2015 *** EXTENDED DEADLINE - October 17 ***

Call for Papers - ARCS 2015

         *** EXTENDED DEADLINE - October 17 ***

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        28th GI/ITG International Conference on
          Architecture of Computing Systems 

          March 24th-27th, 2015, Porto, Portugal
          http://www.cister.isep.ipp.pt/arcs2015/

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The ARCS series of conferences has over 30 years of tradition reporting high quality results in computer architecture and operating systems research. The focus of the 2015 conference will be onreconciling parallelism and predictability in mixed-critical systems. Like the previous conferences in this series, it continues to be an important forum for computer architecture research, including also workshops and tutorials within its technical scope.

The proceedings of ARCS 2015 will be published in the Springer Lecture Notes on Computer Science (LNCS) series. After the conference, authors of selected papers will be invited to submit an extended version of their contribution for publication in a special issue of the Elsevier Journal of Systems Architecture (JSA). Also, a best paper and best presentation award will be provided at the conference.

In 2015, ARCS will be organized by the CISTER Research Centre, and hosted by the School of Engineering of the Polytechnic of Porto.
The conference will be held from March 24, 2015 through March 27, 2015.

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   Topics of interest
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Authors are invited to submit original, unpublished research papers on one of the following topics:

• Multi-/many-core architectures, memory systems, and interconnection networks.
• Models and tools for multi-/many-core systems including but not limited to programming models, runtime systems, middleware, and verification.
• Design, methods, and hardware and software architectures for mixed-critical systems.
• Architectures and design methods/tools for robust, fault-tolerant, real-time embedded systems.
• Generic and application-specific accelerators in heterogeneous architectures.
• Cyber-physical systems and distributed computing architectures.
• Adaptive system architectures such as reconfigurable systems in hardware and software.
• Organic and Autonomic Computing including both theoretical and practical results on self-organization, self-configuration, self-optimization, self-healing, and self-protection techniques.
• Operating Systems including but not limited to scheduling, memory management, power management, and RTOS.
• Energy-awareness and green computing.
• System aspects of ubiquitous and pervasive computing such as sensor nodes, novel input/output devices, novel computing platforms, architecture modeling, and middleware.
• Grid and cloud computing.

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   Submission guidelines
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Submissions should be done through EasyChair at https://www.easychair.org/conferences/?conf=arcs2015, formatted according to the Springer LNCS style (http://www.springer.com/computer/lncs?SGWID=0-164-6-793341-0), and not exceeding 12 pages.

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   Important dates
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Paper submission deadline:          October 17, 2014
Workshop and tutorial proposals: November 3, 2014
Notification of acceptance:            December 1, 2014 (expected)
Camera-ready papers:                   December 15, 2014

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   Organizing committee
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General Co-Chairs
   Luis Miguel Pinho, CISTER/INESC TEC, ISEP, Portugal
   Wolfgang Karl, Karlsruhe Institute of Technology, Germany

Program Co-Chairs
   Albert Cohen, INRIA, France
   Uwe Brinkschulte, Universität Frankfurt, Germany

Publication Chair
   Thilo Pionteck, Universität zu Lübeck, Germany

Industrial Liaison Co-Chairs
   Sascha Uhrig, Technische Universität Dortmund, Germany
   David Pereira, CISTER/INESC TEC, ISEP, Portugal

Workshop and Tutorial Chair
   João M. P. Cardoso, University of Porto, Portugal

Poster Co-Chairs
   Florian Kluge, University of Augsburg, Germany
   Patrick Meumeu Yomsi, CISTER/INESC TEC, ISEP, Portugal
 
Publicity Chair
   Vincent Nelis, CISTER/INESC TEC, ISEP, Portugal

Local Organization Chair
   Luis Ferreira, CISTER/INESC TEC, ISEP, Portugal

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   Technical Program Committee Members
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Michael Beigl, Karlsruhe Institute of Technology, Germany
Mladen Berekovic, Technische Universität Braunschweig, Germany
Simon Bliudze, Rigorous System Design Laboratory (RiSD), EPFL, Switzerland
Florian Brandner, École Nationale Supérieure de Techniques Avancées (ENSTA ParisTech), France
Jürgen Brehm, Leibniz Universität Hannover, Germany
David Broman, KTH Royal Institute of Technology, Sweden, and UC Berkeley, USA
João M.P. Cardoso, University of Porto, Portugal
Luigi Carro, Instituto de Informatica, Universidade Federal do Rio Grande do Sul, Brasil
Koen De Bosschere, Ghent University, Belgium
Nikitas Dimopoulos, University of Victoria, Canada
Ahmed El-Mahdy, Egypt-Japan University for Science and Technology (E-JUST), Alexandria, Egypt
Fabrizio Ferrandi, Politecnico di Milano-DEIB, Italy
Dietmar Fey, Friedrich-Alexander-University Erlangen-Nürnberg, Germany
Pierfrancesco Foglia, Università di Pisa, Italy
William Fornaciari, Politecnico di Milano, Italy
Björn Franke, University of Edinburgh, United Kingdom
Roberto Giorgi, Università di Siena, ITALY
Daniel Gracia Perez, Thales Research & Technology, France
Jan Haase, University of the Federal Armed Forces Hamburg, Germany
Jörg Hähner, Universität Augsburg, Germany
Jörg Henkel, Karlsruhe Institute of Technology, Germany
Andreas Herkersdorf, TU München, Germany
Christian Hochberger, Technische Universität Darmstadt, Germany
Michael Hübner, Chair for Embedded Systems in Information Technology (ESIT), Ruhr-University of Bochum, Germany
Gert Jervan, Tallinn University of Technology, Estonia
Ben Juurlink, Technische Universität Berlin, Germany
Wolfgang Karl, Karlsruhe Institute of Technology, Germany
Christos Kartsaklis, Oak Ridge National Laboratory, USA
Jörg Keller, FernUniversität in Hagen, Germany
Raimund Kirner, University of Hertfordshire, United Kingdom
Andreas Koch, Embedded Systems and Applications Group, TU Darmstadt, Germany
Hana Kubatova, Czech Technical University in Prague, Czech Republic
Olaf Landsiedel, Chalmers University of Technology, Sweden
Paul Lukowicz, Universität Passau, Germany
Erik Maehle, Universität zu Lübeck, Germany
Christian Müller-Schloer, Leibniz Universität Hannover, Germany
Alex Orailoglu, University of California, San Diego , USA
Eduardo Pereira Carlos, Universidade Federal do Rio Grande do Sul, Brazil
Thilo Pionteck, Universität zu Lübeck, Germany
Pascal Sainrat, Université Toulouse III, France
Toshinori Sato, Fukuoka University, Japan
Martin Schulz, Lawrence Livermore National Laboratory, USA
Karsten Schwan, Georgia Institute of Technology, USA
Leonel Sousa, Instituto Superior Técnico (IST), Universidade de Lisboa, Portugal
Rainer Spallek, Technische Universität Dresden, Germany
Olaf Spinczyk, Technische Universität Dortmund, Germany
Benno Stabernack, Fraunhofer Institut für Nachrichtentechnik, Germany
Walter Stechele, Technical University of Munich (TUM), Germany
Djamshid Tavangarian, Universität Rostock, Germany
Jürgen Teich, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany
Martin Törngren, KTH Royal Institute of Technology, Sweden
Eduardo Tovar, CISTER/INESC TEC, ISEP, Portugal
Pedro Trancoso, University of Cyprus, Cyprus
Carsten Trinitis, Technische Universität München, Germany
Sascha Uhrig, Technische Universität Dortmund, Germany
Theo Ungerer, Universität Augsburg, Germany
Hans Vandierendonck, Queen's University Belfast, United Kingdom
Stephane Vialle, SUPELEC & UMI GT-CNRS 2958, France
Lucian Vintan, "Lucian Blaga" University of Sibiu, Romania
Klaus Waldschmidt, Universität Frankfurt am Main, Germany
Stephan Wong, Delft University of Technology, The Netherlands

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   Contact Information
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For any inquiries, feel free to contact Luís Miguel Pinho at lmp@isep.ipp.pt

On behalf of the organizing committee,
Vincent Nélis

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Vincent NELIS
CISTER Research Unit
 
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