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CALL FOR PAPERS
The Journal of Parallel and Distributed Computing
(Elsevier)
Special issue on
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Recent trends in the microprocessor industry have important ramifications for the design of the next generation of high-performance as well as embedded parallel and network-based systems. By increasing number of cores,
it is possible to improve the performance while keeping the power consumption at the bay. This trend has reached the deployment stage in parallel and network-based systems ranging from small ultramobile devices to large telecommunication servers. It is expected
that the number of cores in these systems increases dramatically in the near future. For such systems, energy efficiency is one of the primary design constraints. The cessation of Dennard scaling and the dark silicon phenomenon have limited recent improvements
in transistor speed and energy efficiency, resulting in slowed improvements in multi-core and many-core systems. Consequently, architectural innovation has become crucial to achieve performance and efficiency gains. New technologies that combine different
types of cores or similar cores with different computation capabilities can result in a better match between the workload and the execution hardware improving overall system energy efficiency. In addition, multi-core and many-core systems need to be able to
reconfigure themselves adaptively by monitoring their own condition and the surrounding environment in order to adapt themselves to different scenarios and performance-power requirements. Runtime monitoring becomes crucial in the near future parallel and distributed
multicore systems due to increase in thermal issues as well as due to the need for various adaptive managements. This special issue addresses all aspects of energy-efficient computing in parallel and distributed multi-core and many-core systems.
TOPICS (non-exclusive)
* Power and thermal estimation, analysis, optimization, and management techniques for hardware and software systems
* Energy- and thermal aware application mapping and scheduling
* Energy- and thermal-aware dark silicon system design and optimization
* Energy-efficient heterogeneous system architecture
* Programming models, tools, languages and compilers to support energy-aware computing
* Low-power monitor and sensor circuits
* Energy Efficient defect/fault tolerance, testing, and reliability
* Aging aware design, energy- and thermal-related reliability issues
* Energy-efficient off-chip/on-chip communication architectures including networks-on-chip
* 3D architectures, integration and synthesis
* Energy-proportional systems
* Energy-efficient memory architectures and technologies (e.g. coherence protocols)
* Formal methods for modeling, design and verification of energy efficient parallel and network-based systems
* Application analysis and parallelization for energy-efficient design
* Cases studies of parallel and network-based systems demonstrating energy-efficient implementation as well as emerging applications and design frameworks
TOPICS (non-exclusive)
* Power and thermal estimation, analysis, optimization, and management techniques for hardware and software systems
* Energy- and thermal aware application mapping and scheduling
* Energy- and thermal-aware dark silicon system design and optimization
* Energy-efficient heterogeneous system architecture
* Programming models, tools, languages and compilers to support energy-aware computing
* Low-power monitor and sensor circuits
* Energy Efficient defect/fault tolerance, testing, and reliability
* Aging aware design, energy- and thermal-related reliability issues
* Energy-efficient off-chip/on-chip communication architectures including networks-on-chip
* 3D architectures, integration and synthesis
* Energy-proportional systems
* Energy-efficient memory architectures and technologies (e.g. coherence protocols)
* Formal methods for modeling, design and verification of energy efficient parallel and network-based systems
* Application analysis and parallelization for energy-efficient design
* Cases studies of parallel and network-based systems demonstrating energy-efficient implementation as well as emerging applications and design frameworks
Guest Editors:
* Hannu Tenhunen, Royal Institute of Technology, Sweden (hannu@kth.se)
* Alexander V. Veidenbaum, University of California, Irvine, USA (alexv@ics.uci.edu)
* Jose L. Ayala, Complutense University of Madrid, Spain (jayala@ucm.es)
* Pasi Liljeberg, University of Turku, Finland (pakrli@utu.fi)
* Amir Rahmani, University of Turku, Finland (amirah@utu.fi)
Important Dates:
Manuscript due: September 22nd, 2015 (Hard deadline)
Acceptance/rejection notification: November 15th, 2015
2nd round check: January 15th, 2016
Final manuscript due: March 15th, 2016
Submissions:
Submitted manuscripts will be reviewed according to the peer review policy of JPDC as available on-line at http://www.journals.elsevier.
* Hannu Tenhunen, Royal Institute of Technology, Sweden (hannu@kth.se)
* Alexander V. Veidenbaum, University of California, Irvine, USA (alexv@ics.uci.edu)
* Jose L. Ayala, Complutense University of Madrid, Spain (jayala@ucm.es)
* Pasi Liljeberg, University of Turku, Finland (pakrli@utu.fi)
* Amir Rahmani, University of Turku, Finland (amirah@utu.fi)
Important Dates:
Manuscript due: September 22nd, 2015 (Hard deadline)
Acceptance/rejection notification: November 15th, 2015
2nd round check: January 15th, 2016
Final manuscript due: March 15th, 2016
Submissions:
Submitted manuscripts will be reviewed according to the peer review policy of JPDC as available on-line at http://www.journals.elsevier.
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