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Call for Papers
4th Workshop on High-performance and Real-Time Embedded Systems (HiRES 2016)
January 19, 2016, Prague, Czech Republic
To be held in conjunction with the 11th International Conference on
High-Performance and Embedded Architectures and Compilers (HiPEAC 2016)
http://www.cister.isep.ipp.pt/
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Goal of the Workshop
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Increasingly, time is a relevant concern which impacts in all application areas and challenges ahead. Real-time requirements can be found in applications ranging from large-scale data processing systems to deeply embedded devices. Examples include safety-critical systems with high-performance requirements, such as collision avoidance and autonomous driving in avionics and automotive respectively, in which the correct timing behaviour is of paramount importance; consumer systems, such as video processing in TV sets and games; or real-time complex event processing applications, such as online trading or real-time traffic management.
In all these applications, systems are expected to cope with an increasing demand of functional and non-functional requirements, with the corresponding increase in processing capabilities, paving the way for high-performance architectures, of which multi-core and many-core systems are becoming pervasive. The capabilities and challenges of parallelization as a means to provide higher performance is a cross-cutting concern.
This workshop intends to bring together researchers and engineers in the confluence of high-performance, embedded systems and real-time systems. The goal is to allow for fruitful discussions on the challenges and research directions that should be tackled by the community. Papers are invited to illustrate current and future work in the theory and practice of the design and engineering of high-performance real-time embedded systems for a variety of application domains.
This is the 4th workshop in the series. Information on previous workshop can be found at:
- HiRES 2013: http://www.cister.isep.ipp.pt/
- HiRES 2014: http://www.cister.isep.ipp.pt/
- HiRES 2015: http://www.cister.isep.ipp.pt/
Topics of interest
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Topics of interest to this edition of the workshop include but are not limited to:
- Runtimes and operating systems combining high-performance and predictability requirements;
- Programming models and compiler support for providing real-time capabilities to multi- and many-core architectures;
- Models and tools for code generation, system verification and validation;
- Worst-case execution time analysis, parallel/dag-based task models, schedulability analysis of multi- and many-core systems;
- Heterogeneous multi-core embedded real-time architectures, many-core accelerators;
- Time-predictable multi- and many-core processor architectures;
- Time-aware energy-efficiency.
Paper submission
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Submitted papers should use the LNCS format and should be 12 pages maximum. Submissions are handled through easychair at https://www.easychair.org/conf
HiRES goals are to allow for interaction and discussion on early results. Informal proceedings will be provided to the participants and online on the workshop website, but no formal publication will be provided.
Important dates
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Submission deadline: Abstract registration - October 14, 2015
Paper submission - October 20, 2015
Notification to authors: November 23, 2015
Final version of accepted papers: December 15, 2015
Workshop: January 19, 2016
Organizers
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Luís Miguel Pinho, CISTER, Portugal
Eduardo Quiñones, BSC, Spain
Sascha Uhrig, Airbus Group Innovations, Germany
Program Committee
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Albert Cohen, INRIA, France
Alejandro Alonso, Universidad Politécnica de Madrid, Spain
Andrea Marongiu, ETHZ, Switzerland
Eduardo Quiñones, BSC, Spain
Johan Eker, Ericsson, Sweden
Luís Miguel Pinho, CISTER, Portugal
Marko Bertogna, University of Modena, Italy
Martin Schoeberl, DTU, Denmark
Neil Audsley, University of York, UK
Philippe Bonnot, Thales, France
Sascha Uhrig, TU Dortmund, Germany
Theo Ungerer, University of Augsburg, Germany
Zlatko Petrov, Honeywell, Czech Republic
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