Saturday, 14 January 2017

++ Deadline extended: January 27 ++ [CFP] RAW 2017 - 24th Reconfigurable Architectures Workshop

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Please note the deadline for abstract submission has been extended to January 23, and the submission deadline has been extended to January 27.


                  CALL FOR PAPERS
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     24th Reconfigurable Architectures Workshop
                                     RAW 2017            
Buena Vista Palace Hotel         
Orlando, Florida, USA, May 29-30 2017
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QUICK LINK:       Web site: http://raw.necst.it/
IMPORTANT DATES:        New abstract submission: January 23, 2017
                New Submission deadline: January 27, 2017
                Decision notification February 17, 2017

__________________________________________________________________
__________________________________________________________________

The 24th Reconfigurable Architectures Workshop (RAW 2017) will be held in Orlando, Florida USA in May 2017. RAW 2017 is associated with the 31st Annual IEEE International Parallel & Distributed Processing Symposium (IEEE IPDPS 2017) and is sponsored by the IEEE Computer Society and the Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.

A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand.
The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing.
The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.

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SUBMISSION OF PAPERS

All manuscripts will be reviewed by at least three members of the program committee. Submissions should be a complete manuscript or, in special cases, may be a summary of relevant work. Manuscript for full paper should be not exceed 8 single-spaced, double-column pages using 10-point size font on 8.5X11 inch pages (IEEE conference style) including references, figures and tables. Manuscript for short papers should be not exceed 4 single-space, double-column pages.
Papers are to be submitted through EasyChair. Submitted papers should not have appeared in or be under consideration for a different workshop, conference or journal. It is also expected that all accepted papers (regular or short) will be presented at the workshop by one of the authors.
All papers must be submitted electronically in PDF format.Submissions can be made through:
* the RAW2017 web site: http://raw.necst.it/

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IMPORTANT DATES
                New abstract submission date: January 23, 2017
                New submission deadline: January 27, 2017
                Decision notification February 17, 2017  Conference: May 29-30, 2017

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KEYNOTE
                Ronald F. DeMara, Director of Computer Architecture Laboratory, University of Central Florida
                Georgi Gaydadjiev, VP of Dataflow Software Engineering, Maxeler Technologies Ltd

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TOPICS OF INTEREST

    Hot Topics in Reconfigurable Computing
                Configurable Cloud
                Heterogeneous Computing in Data Centers
                Accelerating Data Center Workloads
                FPGA-based Deep Learning
                Accelerating Genomic Computations
                Acceleration of Data Analytics
               Reconfigurable Computing in the IoT era
                Organic Computing, Biology-Inspired Solutions
                Applications in Finance

    Architectures & CAD
                Algorithmic Techniques and Mapping
                Emerging Technologies (optical models, 3D Interconnects, devices)
                Reconfigurable Accelerators
                Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)
                FPGA-based MPSoC and Multicore
                Distributed Systems & Networks
                Wireless and Mobile Systems
                Critical issues (Security, Energy efficiency, Fault-Tolerance)

    Runtime & System Management
                Run-Time Reconfiguration Models and Architectures
                Autonomic computing systems
                Operating Systems and High-Level Synthesis
                High-Level Design Methods (Hardware/Software co-design, Compilers)
                System Support (Soft processor programming)
                Runtime Support
                Reconfiguration Techniques
                Simulations and Prototyping (performance analysis, verification tools)

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ORGANIZERS

Workshop Chairs
                Marco D. Santambrogio, Politecnico di Milano, Italy
                Ramachandran Vaidyanathan, Louisiana State University, USA

Program Chairs
                Diana Goehringer, Ruhr-University Bochum, Germany
                Donatella Sciuto, Politecnico di Milano, Italy

Program Vice Chairs
                Dirk Stroobandt, Ghent University, Belgium
                Francesca Palumbo, Università di Sassari, Italy
                Ann Gordon-Ross, University of Florida, USA

Steering Committee
                Juergen Becker, Karlsruhe Insttute of Technology, Germany
                Viktor K. Prasanna, University of Southern California, USA
                Ramachandran Vaidyanathan, Louisiana State University, USA

Publicity
                Brian Veale, IBM, USA
                Ivan Beretta, University of Westminster, UK

The University of Westminster is a charity and a company limited by guarantee. Registration number: 977818 England. Registered Office: 309 Regent Street, London W1B 2UW.
This message and its attachments are private and confidential. If you have received this message in error, please notify the sender and remove it and its attachments from your system.

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