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(apologies for cross-postings)
DEADLINE: PDSEC-17: extended deadline: Jan 27 (final)
The 18th IEEE International Workshop on Parallel and Distributed
Scientific and Engineering Computing (PDSEC-17) http://cse.stfx.ca/~pdsec17
will be held on Jun 02, 2017, Florida USA in conjunction with IPDPS 2017.
Scope and Interests:
The technological trends of HPC system evolution indicates increasing
burden for application developers in management of the unprecedented
levels of complexity in hardware and the associated performance
characteristics. Many existing application codes are unlikely to
perform well on future systems without major modifications or even
complete rewrites. It will be important to utilize, in unison, many
characteristics such as multiple levels of parallelism, many
lightweight cores, complex memory hierarchies, novel I/O technology,
power capping, systemwide temporal/spatial performance heterogeneity
and reliability concerns. The HPC community has developed new
programming models, algorithms, libraries and tools to meet these
challenges in order to accommodate productive code development and
effective system use. However, the application community still needs
to identify the benefit through practical evaluations.
The focus of this workshop is on methodologies and experiences
of scientific and engineering applications and algorithms to achieve
sustainable code development for better productivity, application
performance and reliability.
Important Dates:
Paper submission due (FINAL EXTENSION) . . . . . January 27, 2017
Notification of Acceptance . . . . . . . . . . . February 24, 2017
Final camera-ready paper . . . . . . . . . . . . March 15, 2017 (TBC)
Workshop . . . . . . . . . . . . . . . . . . . . June 02, 2017
General Chairs
Peter Strazdins, Australian National University, Australia
Raphael Couturier, University of Franche-Comte, France
Program Chairs
Keita Teranishi, Sandia National Laboratories, USA
Joseph Antony, National Computational Infrastructure, Australia
Steering Committee
Thomas Rauber, University of Bayreuth, Germany
Gudula Runger, Chemnitz University of Technology, Germany
Laurence T. Yang (Chair), St. Francis Xavier University, Canada
--
Regards, Peter
------------------------------ ------------------------------ ------------
Peter Strazdins, PhD GHCE, SIEEE SFHEA
Research School of Computer Science
ANU College of Engineering and Computer Science
CSIT Building 108, North Rd
The Australian National University, Canberra ACT 2601 AUSTRALIA
T: +61 2 6125 5140 F: +61 2 6125 0010
W: http://cs.anu.edu.au/~Peter. Strazdins
E: Peter.Strazdins@cs.anu.edu.au
------------------------------ ------------------------------ ------------
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sent to . If you'd like to opt out of these
announcements, information on how to unsubscribe is available at the
bottom of this email.]
(apologies for cross-postings)
DEADLINE: PDSEC-17: extended deadline: Jan 27 (final)
The 18th IEEE International Workshop on Parallel and Distributed
Scientific and Engineering Computing (PDSEC-17) http://cse.stfx.ca/~pdsec17
will be held on Jun 02, 2017, Florida USA in conjunction with IPDPS 2017.
Scope and Interests:
The technological trends of HPC system evolution indicates increasing
burden for application developers in management of the unprecedented
levels of complexity in hardware and the associated performance
characteristics. Many existing application codes are unlikely to
perform well on future systems without major modifications or even
complete rewrites. It will be important to utilize, in unison, many
characteristics such as multiple levels of parallelism, many
lightweight cores, complex memory hierarchies, novel I/O technology,
power capping, systemwide temporal/spatial performance heterogeneity
and reliability concerns. The HPC community has developed new
programming models, algorithms, libraries and tools to meet these
challenges in order to accommodate productive code development and
effective system use. However, the application community still needs
to identify the benefit through practical evaluations.
The focus of this workshop is on methodologies and experiences
of scientific and engineering applications and algorithms to achieve
sustainable code development for better productivity, application
performance and reliability.
Important Dates:
Paper submission due (FINAL EXTENSION) . . . . . January 27, 2017
Notification of Acceptance . . . . . . . . . . . February 24, 2017
Final camera-ready paper . . . . . . . . . . . . March 15, 2017 (TBC)
Workshop . . . . . . . . . . . . . . . . . . . . June 02, 2017
General Chairs
Peter Strazdins, Australian National University, Australia
Raphael Couturier, University of Franche-Comte, France
Program Chairs
Keita Teranishi, Sandia National Laboratories, USA
Joseph Antony, National Computational Infrastructure, Australia
Steering Committee
Thomas Rauber, University of Bayreuth, Germany
Gudula Runger, Chemnitz University of Technology, Germany
Laurence T. Yang (Chair), St. Francis Xavier University, Canada
--
Regards, Peter
------------------------------
Peter Strazdins, PhD GHCE, SIEEE SFHEA
Research School of Computer Science
ANU College of Engineering and Computer Science
CSIT Building 108, North Rd
The Australian National University, Canberra ACT 2601 AUSTRALIA
T: +61 2 6125 5140 F: +61 2 6125 0010
W: http://cs.anu.edu.au/~Peter.
E: Peter.Strazdins@cs.anu.edu.au
------------------------------
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(https://lists.mcs.anl.gov/
If you do not remember your password (which is needed to change these options), you can reset it using the "Unsubscribe or Edit Options" button at the bottom of the page.
(https://lists.mcs.anl.gov/
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