Wednesday, 18 January 2017

FW: [IPDPS] DEADLINE EXTENSION: Workshop of Large-scale Parallel Processing: Practice and Experience

[Apologies if you got multiple copies of this email. This message is
sent to . If you'd like to opt out of these
announcements, information on how to unsubscribe is available at the
bottom of this email.]


[Please accept our apologies if you receive multiple copies]

--------------------------------------------------------------------------------------------------------------------------------
Call for papers:  Workshop on LARGE-SCALE PARALLEL PROCESSING:  PRACTICE AND EXPERIENCE

                                                  To be held in conjunction with
              IEEE International Parallel and Distributed Processing Symposium (IPDPS)
                                                          Orlando, Florida, USA
                                                                 June 2, 2017

NEW SUBMISSION DEADLINE:  January 23 , 2017
--------------------------------------------------------------------------------------------------------------------------------

The Large-Scale Parallel Processing:  Practice and Experience workshop is a forum that
focuses on best-practice approaches to the design and utilization of computer systems
that scale to thousands of processing elements and beyond.  Large-scale systems, referred
to by some as Extreme-scale or Ultra-scale, have many important research aspects that
need detailed examination in order for their effective design, deployment, and utilization
to take place.  These include, but are not limited to, handling the substantial increase
in per-chip core count, heterogeneity and specialized processor and intra-node architectures,
complex communication and memory hierarchies, and communication and synchronization
mechanisms.  The workshop aims to bring together researchers and practitioners that have
experience designing, building, and using such systems for a dynamic exchange of ideas.  The
goal is to span topics that range from hardware through the software and application stacks.

Of particular interest are papers that describe best practices in the design and utilization of
such systems.  Results shown at large scales are welcome, as are smaller-scale results that
have clear applicability to large-scale systems.  In particular, topics areas of interest
include:

- LARGE-SCALE SYSTEMS : exploiting parallelism at large-scale,
  the coordination of large numbers of processing elements,
  synchronization and communication at large-scale, programming
  models and productivity

- NOVEL ARCHITECTURES AND EXPERIMENTAL SYSTEMS : the design of
  novel systems, the use of processors in memory (PIMS),
  parallelism in emerging technologies, future trends.

- MULTI-CORE : utilization of increased parallelism on a single
  chip (MPP on a chip such as the Cell and GPUs), the possible
  integration of these into large-scale systems, and dealing with
  the resulting hierarchical connectivity.

- MONITORING, ANALYSIS AND MODELING : tools and techniques for 
  gathering performance, power, thermal, reliability, and other 
  data from existing large scale systems, analyzing such data 
  offline or in real time for system tuning, and modeling of 
  similar factors in projected system installations.

- ENERGY MANAGEMENT: Techniques, strategies, and experiences 
  relating to the energy management and optimization of 
  large-scale systems.

- APPLICATIONS : novel algorithmic and application methods,
  experiences in the design and use of applications that scale to
  large-scales, overcoming of limitations, performance analysis
  and insights gained.

- WAREHOUSE COMPUTING: dealing with the issues in advanced 
  datacenters that are increasingly moving from co-locating many 
  servers to having a large number of servers working cohesively, 
  impact of both software and hardware designs and optimizations 
  to achieve best cost-performance efficiency. 

Work may involve algorithms, languages, various types of models, or 
hardware.

-----------------------------------------------------------------
SUBMISSION GUIDELINES

Papers should not exceed eight single-space pages (including 
figures, tables and references) using a 10-point font on 8.5x11
inch pages. Submissions in PostScript or PDF should be made 
using EDAS (www.edas.info). Informal enquiries can be made to 
Kevin.Barker@pnnl.gov. Submissions will be judged on correctness,
originality, technical strength, significance, presentation
quality and appropriateness. Submitted papers should not have
appeared in or under consideration for another venue.

IMPORTANT DATES

Submission deadline:  January 23rd 2017
Notification of acceptance:  February 17th 2017
Camera-Ready Papers due:  February 27th 2017


********************************************************************************













(https://lists.mcs.anl.gov/mailman/listinfo/hpc-announce
  If you do not remember your password (which is needed to change these options), you can reset it using the "Unsubscribe or Edit Options" button at the bottom of the page.



(https://lists.mcs.anl.gov/mailman/listinfo/hpc-announce)






.
********************************************************************************


No comments:

Post a Comment