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Call for Papers
Hardware-software codesign involves the concurrent design of hardware and software components of complex computer systems, whereby application requirements influence architecture design and hardware constraints influence design of algorithms and software. High Performance Computing (HPC) is facing daunting challenges as we move towards the exascale era, with the necessity of designing systems that run large-scale simulations with high performance while meeting cost and energy consumption constraints. Effective codesign requires collaboration between domain scientists, applied mathematicians, computer scientists, and hardware architects. Representative proxy applications, ranging from kernels to miniapplications, must be extracted from and validated against full applications to allow for evaluation on new and emerging hardware architectures. Hardware must be designed to meet application requirements while meeting cost constraints. Finally, system software must be designed that supports the programming and execution models required for highly concurrent, complex, and heterogeneous applications and systems.
We solicit high quality, original research articles as well as review articles focused on the interrelationships between algorithms/applications, systems software, and hardware and on methodologies and tools for hardware-software codesign for HPC.
Potential topics include, but are not limited to:
- Use of simulation and emulation techniques for codesign
- Modeling and prediction of performance and energy consumption
- Cooptimization for multiple objectives (such as performance, power, and resilience)
- Evaluation of new processor and memory technologies for scientific applications
- Mapping of algorithms and applications to heterogeneous systems
- Concurrent design space exploration of software and hardware
- Design and validation of proxy applications
- Bounds analysis of application requirements with respect to data movement and power/energy consumption
- Programming and execution models for new architectures
- Design and use of reconfigurable hardware for meeting application requirements
Authors can submit their manuscripts via the Manuscript Tracking System at http://mts.hindawi.com/
| Manuscript Due | 29 January 2016 |
| First Round of Reviews | April 2016 |
| Publication Date | July 2016 |
Lead Guest Editor
- Shirley Moore, University of Texas at El Paso, El Paso, USA
Guest Editors
- Mark Gordon, Iowa State University, Ames, USA
- Laura Carrington, San Diego Supercomputer Center, San Diego, USA
- Gregory Peterson, University of Tennessee, Knoxville, USA
- Richard Vuduc, Georgia Institute of Technology, Atlanta, USA
- Theresa Windus, Iowa State University, Ames, USA
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