Thursday 27 February 2014

International Symposium on Parallel and Distributed Processing with Applications IEEE ISPA 2014

 International Symposium on Parallel and Distributed
                 Processing with Applications
                        IEEE ISPA 2014

                    26th-28th August, Milan

                    http://ispa14.necst.it/

*************************************************************

ISPA-14 (12th IEEE International Symposium on Parallel and Distributed
Processing with Applications) is a forum for leading work on parallel
and distributed computing and networking, including architecture,
compilers, runtime systems, applications, reliability, security,
parallel programming models and much more.

During the symposium, scientists and engineers in both academia and
industry are invited to present their work on concurrent and parallel
systems (multicore, multithreaded, heterogeneous, clustered systems,
distributed systems, grids, clouds, and large scale machines).

The 12th ISPA follows the tradition of previous successful ISPA
conferences, ISPA-03 (Aizu, Japan), ISPA-04 (Hong Kong), ISPA-05
(Nanjing, China), ISPA-06 (Sorrento, Italy), ISPA-07 (Niagara Falls,
Canada), ISPA-08 (Sydney, Australia), ISPA-09 (Chengdu, China), ISPA-10
(Taipei, Taiwan), ISPA-11 (Busan, Korea), ISPA-12 (Madrid, Spain) and
ISPA-13 (Melbourne, Australia). It will feature session presentations,
workshops, tutorials and keynote speeches. ISPA-14 is sponsored by IEEE
Technical Committee on Scalable Computing (TCSC) and IEEE Computer Society.

ISPA-14 is particularly interested in research addressing parallel
workloads, tools and methodologies to improve the quality of parallel
programming. We are also seeking work that exploit synergy between
parallel programming models and emerging architectures and
infrastructures. Specific topics of interest include (but are not
limited to):

* Parallel and Distributed Algorithms, and Applications
* High-performance scientific and engineering computing
* Building block processors: FPGA, multicore, GPU, SoC
* Architectures and Virtualization
* Middleware and tools
* Network and pervasive computing
* Performance simulations, measurement, and evaluations
* Reliability, fault tolerance, and security
* Database, data mining, and data management
* Virtualization techniques, tools, and applications
* Parallel/distributed system architectures
* Tools/environments for parallel/distributed software development
* Novel parallel programming paradigms
* Code generation and optimization
* Compilers for parallel computers
* Distributed systems and applications
* Wireless networks, mobile, and pervasive computing
* Energy management and power optimization
* Green Computing and Energy-aware computing
* Grid and cluster computing
* Scientific cloud systems and services
* Programming models for cloud services and applications
* Internet computing and web services
* Data intensive applications and Internet-Of-Things
* IoT and Ubiquitous computing: application scenarios
* Data storage and big data
* Experience with
   - computational applications
   - workflow applications
   - data-intensive applications
* Scheduling and resource management
* Multi-clouds environments, cloud federation, interoperability


*** Important Dates ***

Submission Deadline: 11:59PM (UTC/GMT -11 hours) March 9, 2014
Workshop Proposal: March 9, 2014
Authors Notification: May 9, 2014
Final Manuscript Due: June 8, 2014


*** Publications ***
Accepted and presented papers will be included in the IEEE CPS
Proceedings. All submissions must be made electronically through the
conference web site. Submissions must include contact information, the
full list of authors and their affiliations and must be in PDF. The
materials presented in the papers should not be published or under
submission elsewhere. Each paper is limited to 8 pages (or 10 pages with
over length charge) including figures and references using IEEE Computer
Society Proceedings Manuscripts style (two columns, single-spaced, 10
point fonts). IEEE Computer Society Proceedings Author Guidelines:

http://www.computer.org/portal/web/cscps/formatting


*** Organisation Committee ***

General Chairs:
Marco D. Santambrogio, Politecnico di Milano
Jian Li, IBM research

Program Chairs:
Simone Campanoni, Harvard University
Martina Maggio, Lund University

Steering Committee:
Minyi Guo, Shanghai Jiao Tong University
Laurence T. Yang, St. Francis Xavier University

Publicity Chairs:
Chao Wang, University of Science and Technology of China
Timothy M. Jones, University of Cambridge
Krishna Rangan, Intel

Workshop/special session Chairs:
Dionisios N. Pnevmatikatos, TU Crete
Diana Goehringer, Ruhr-University Bochum

Program Committee:
Please check the full list at http://ispa14.necst.it/


--
Best Regards~

Chao Wang
Embedded System Laboratory, University of Science and Technology of China
166,Ren'ai Road,Suzhou Dushu Lake Higher Education Town
Suzhou, Jiangsu, P.R. China 215123
saintwc@mail.ustc.edu.cn

CALL FOR PAPERS HLPP 2014 7th International Symposium on High-level Parallel Programming and Applications

CALL FOR PAPERS

                                HLPP 2014

                     7th International Symposium on
             High-level Parallel Programming and Applications

                         Amsterdam, Netherlands
                             July 3-4, 2014

https://sites.google.com/site/hlpp2014amsterdam/

===========================================================================

Aims and scope:

As processor and system manufacturers increase the amount of both inter-
and intra-chip parallelism it becomes crucial to provide the software
industry with high-level, clean and efficient tools for parallel
programming.
Parallel and distributed programming methodologies are currently dominated
by low-level techniques such as send/receive message passing, or
equivalently
unstructured shared memory mechanisms. Higher-level, structured approaches
offer many possible advantages and have a key role to play in the scalable
exploitation of ubiquitous parallelism.

Since 2001 the HLPP series of workshops/symposia has been a forum for
researchers developing state-of-the-art concepts, tools and applications
for high-level parallel programming. The general emphasis is on software
quality, programming productivity and high-level performance models. The
7th Symposium on High-Level Parallel Programming and Applications will be
held July 3-4 in the historic center of Amsterdam.

===========================================================================

Proceedings:

Accepted papers will be distributed as informal draft proceedings during
the
symposium. All accepted papers will be published by Springer in a special
issue of the International Journal of Parallel Programming (IJPP).

===========================================================================

Important dates:

Submission deadline:     April 4 (anywhere on earth)
Author notification:     May 1
Camera-ready paper due:  June 16

===========================================================================

Topics:

HLPP 2014 invites papers on all topics in high-level parallel programming,
its tools and applications including, but not limited to, the following
aspects:

  + High-level programming and performance models (BSP, CGM, LogP, MPM,
etc.)
    and their tools
  + Declarative parallel programming methodologies
  + Algorithmic skeletons and constructive methods
  + Declarative parallel programming languages and libraries:
    semantics and implementation
  + Verification of declarative parallel and distributed programs
  + Software synthesis, automatic code generation for parallel programming
  + Model-driven software engineering with parallel programs
  + High-level programming models for heterogeneous/hierarchical platforms
  + High-level parallel methods for large datasets
  + Applications of parallel systems using high-level languages and tools
  + Teaching experience with high-level tools and methods

===========================================================================

Paper preparation and submission:

Papers submitted to HLPP2014 must describe original research results and
must not have been published or simultaneously submitted anywhere else.
Manuscripts must be prepared with the Springer IJSS latex macro package
and submitted via the EasyChair Conference Management System.

Each paper will receive a minimum of three reviews by members of the
international technical programme committee (see below). Papers will be
selected based on their originality, relevance, technical clarity and
quality of presentation. At least one author of each accepted paper must
register for the HLPP 2014 symposium and present the paper.

===========================================================================

HLPP Organizer and programme chair:

  Clemens Grelck
  Informatics Institute
  University of Amsterdam
  Science Park 904
  1098XH Amsterdam
  Netherlands
  c.grelck@uva.nl

===========================================================================

HLPP steering committee:

  Clemens Grelck (Universiteit van Amsterdam, Netherlands)
  Ga?tan Hains (Universit? Paris-Est, France)
  Kiminori Matsuzaki (Kochi University of Technology, Japan)
  Fr?d?ric Loulergue (Universit? d'Orl?ans, France)
  Quentin Miller (Somerville College Oxford, United Kingdom)
  Alexander Tiskin (University of Warwick, United Kingdom)

===========================================================================

Previous HLPP symposia and workshops:

  HLPP 2013, Paris, France
  HLPP 2011, Tokyo, Japan
  HLPP 2010, Baltimore, USA
  HLPP 2005, Coventry, United Kingdom
  HLPP 2003, Paris, France
  HLPP 2001, Orl?ans, France

===========================================================================

--
----------------------------------------------------------------------
Dr Clemens Grelck                                     Science Park 904
University Lecturer                                   1098XH Amsterdam
                                                            Netherlands
University of Amsterdam
Institute for Informatics                        T +31 (0) 20 525 8683
Computer Systems Architecture Group              F +31 (0) 20 525 7490

Office C3.105                               www.science.uva.nl/~grelck

Thief out Now! – AMD Gaming Evolved Newsletter

February 2014    |    Past Issues 
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Webinar Invitation: Accelerating Full Waveform Inversion via OpenCL™ on AMD GPUs

Join Acceleware Product Manager Chris Mason on Wednesday, March 5 at 11 a.m. PST for a webinar as Chris presents a case study of accelerating a seismic algorithm on a cluster of AMD GPU compute nodes for a geophysical software provider. This dynamic webinar will include a programming example, step-by-step project phase profiling, optimizations techniques, a look at the strategy behind taking advantage of the massively parallel GPU architecture, and run time performance results. Space is limited so register today.
Chris Mason has eight years of experience developing commercial applications for the GPU and multi-core CPUs. His previous experience also includes parallelization of algorithms on digital signal processors (DSPs) for cellular phones and base stations. His specialty is in electromagnetic simulations, medical imaging, signal processing and linear algebra. Chris has a Masters degree in Electrical Engineering from Stanford University.
Webinar Details
Presenters:Chris Mason, Acceleware Product Manager
Date:Wednesday March 5, 2014
Time:11 a.m. PST
Register Today

Wednesday 26 February 2014

The Fifth workshop on Big Data Benchmarks, Performance Optimization, and Emerging Hardware

The Fifth workshop on Big Data Benchmarks, Performance Optimization, and Emerging Hardware
Co-located with VLDB 2014
Web: http://prof.ict.ac.cn/bpoe_5_vldb/
September 5th, 2014, Hangzhou, China

Introduction:
Big data has emerged as a strategic property of nations and organizations. There are driving needs to generate values from big data.
However, the sheer volume of big data requires significant storage capacity, transmission bandwidth, computations, and power consumption.
It is expected that systems with unprecedented scales can resolve the problems caused by varieties of big data with daunting volumes.
Nevertheless, without big data benchmarks, it is very difficult for big data owners to make choice on which system is best for meeting with
their specific requirements. They also face challenges on how to optimize the systems and their solutions for specific or even comprehensive
workloads. Meanwhile, researchers are also working on innovative data management systems, hardware architectures, operating systems, and
programming systems to improve performance in dealing with big data.

This workshop, the fifth its series, focuses on architecture and system support for big data systems, aiming at bringing researchers and
practitioners from data management, architecture, and systems research communities together to discuss the research issues at the intersection
of these areas.

Topics:

The workshop seeks papers that address hot topic issues in benchmarking, designing and optimizing big data systems.
Specific topics of interest include but are not limited to:

** Big data workload characterization and benchmarking
** Performance analysis of big data systems
** Workload-optimized big data systems
** Innovative prototypes of big data infrastructures
** Emerging hardware technologies in big data systems
** Operating systems support for big data systems
** Interactions among architecture, systems and data management
** Hardware and software co-design for big data
** Practice report of evaluating and optimizing large-scale big data systems

Papers should present original research. As big data spans many disciplines, papers should provide sufficient background material to make them
accessible to the broader community.

Important dates:
Abstract due: June 15, 2014
Papers due: June 30, 2014
Notification of acceptance: July 15, 2014
Camera-ready: July 30, 2014
Workshop session: September 5, 2014

Submissions:
Papers must be submitted in PDF and formatted according to the conference?s camera-ready format, as embodied in the document templates.
The maximum paper length is 8 pages for full papers and 4 pages for mini-papers. The submissions will be judged based on the merit of the
ideas rather than the length. Final papers will submitted for inclusion in the ACM Digital Library.

Submissions site: https://www.easychair.org/conferences/?conf=bpoe05

Call for papers Journal of Parallel and Distributed Computing: Special Issue on: Architectures and Algorithms for Irregular Applications

Call for papers
Journal of Parallel and Distributed Computing:
Special Issue on: Architectures and Algorithms for Irregular Applications
http://www.journals.elsevier.com/journal-of-parallel-and-distributed-computing/call-for-papers/architectures-and-algorithms-for-irregular-applications/


Motivation

There is an emergence of data intensive, irregular applications for knowledge discovery in such diverse fields as cybersecurity, bioinformatics, Computer Aided Design, machine learning, and the semantic analysis of complex social, transportation, and communication networks.   Knowledge discovery applications operate on web-scale data sets best represented as graphs using pointer- or linked list based data structures.  Consequently, these applications are irregular in both data and control flow.  For the most part, they generate concurrent activity per data element and unpredictable, fine-grain communication requests.  Since extent supercomputing systems are built with hardware components and software stacks optimized for data locality and regular computation, developing irregular applications for these systems demands a substantial effort and still results in poor execution performance and scalability.

New designs are needed to address irregular application challenges impacting all aspects of the computer hardware and software stack, including micro- and system-architectures, runtime systems, compilers, languages, libraries, and algorithms. Only collaborative efforts among researchers with different expertise can lead to significant breakthroughs. The objective of this special issue is to collect the most novel approaches for irregular applications and to establish a foundation on which future solutions can be built.  This special issue will catalyze the surging interest in irregular applications.  We will accept both novel unpublished work, as well as published, but significantly extended, work. Articles may address any aspect of the hardware and software stack listed above.

Call for Papers

There is an emergence of data intensive, irregular applications for knowledge discovery in such diverse fields as cybersecurity, bioinformatics, Computer Aided Design, machine learning, and the semantic analysis of complex social, transportation, and communication networks.   Knowledge discovery applications operate on web-scale data sets best represented as graphs using pointer- or linked list based data structures.  While these applications have a significant degree of latent parallelism, they are difficult to scale on current high-performance computer systems because of their fine-grain, irregular, and unpredictable data accesses.   Moreover, their data sets are difficult to partition and generate load imbalances.

Current high performance architectures rely on data locality, regular computations, structured data, and assume datasets that are easy to partitioned.  Consequently, they do not support the requirements of irregular applications.  Addressing these requirements throughout the hardware and software stack of current and future system architectures will become critical to solving the scientific challenges of the next decade.

This special issue seeks to explore solutions for supporting efficient design, development, and execution of irregular applications in the form of new features for micro- and system- architectures, runtime systems, compilers, languages, libraries, and algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to:

* Micro- and System-architectures
* Network and memory architectures
* Manycore, hybrid, heterogeneous and custom architectures (Tilera, GPUs, FPGAs) Modeling, evaluation and characterization of architectures for memory intensive and irregular applications
* Innovative algorithmic techniques
* Combinatorial (graph) algorithms and their applications Parallelization techniques and data structures Languages and programming models
* Library and runtime support
* Compiler and analysis techniques
* Case studies of irregular applications (e.g. Semantic Graph Databases, Data Mining, Security, Bioinformatics

This  special  issue  solicits  novel,  unpublished  work,  and  previously  published,  but significantly extended, work.

Submission Format
The submitted papers must be written in English and describe original research which is not published nor currently under review by other journals or conferences. Author guidelines for preparation of manuscripts can be found at http://www.elsevier.com/journals/journal-of-parallel-and-distributed-computing/0743-7315/guide-for-authors.

For more information, please contact Antonino Tumeo (antonino.tumeo@pnnl.gov).

Submission Guidelines
All manuscripts and any supplementary material should be submitted through Elsevier Editorial System (EES). The authors must select ??Special Issue: AAIA?? when they reach the ??Article Type?? step in the submission process. The EES website is located at:http://ees.elsevier.com/jpdc.

Paper submission:
November 15, 2013 to March 24, 2014 (EXTENDED)
Acceptance notification:
July 26, 2014 (EXTENDED)
Final papers:
September 29, 2014 (EXTENDED)

Guide for Authors
This site will guide you stepwise through the creation and uploading of your article. The Guide for Authors can be found on the JPDC journal homepage (http://www.elsevier.com/locate/jpdc).

Guest Editors:
John T. Feo, PNNL
Antonino Tumeo, PNNL
Timothy G. Mattson, Intel
Oreste Villa, NVIDIA
Simone Secchi, Universit? di Cagliari

--
Best Regards,
Antonino Tumeo
Research Scientist
High Performance Computing
Pacific Northwest National Laboratory
antonino.tumeo@pnnl.gov

Tuesday 25 February 2014

Call for Papers 10th International Workshop on Scheduling and Resource Management for Parallel and Distributed Systems (SRMPDS '14)

Call for Papers
                        10th International Workshop on
                Scheduling and Resource Management for Parallel and
                        Distributed Systems (SRMPDS '14)
         To be held in conjunction with 2014 International Conference
                        on Parallel Processing (ICPP '14)
                      Minneapolis, MN, September 9-12, 2014

SCOPE:
The goal of this workshop is to bring together researchers and
practitioners working in the areas of resource scheduling and
resource management to exchange and share their experiences, new
ideas, and latest research results on all aspects of scheduling
and resource management in parallel and distributed systems
including Grids and Clouds.

TOPICS OF INTEREST:
Topics of interest for the workshop include, but are not limited to:
Resource allocation and management
Advance resource reservation and scheduling
Load sharing and Load balancing techniques
Network resource allocation
Fault-tolerant resource management approaches
Data access and management
Scheduling data intensive jobs
Scheduling on heterogeneous nodes
Time slicing, gang, or co-scheduling
Fairness, priorities, and accounting Issues
Performance implications of scheduling strategies
Performance metrics to compare scheduling schemes
Virtualization of resources

PROCEEDINGS:
Proceedings of workshops will be published by the Conference
Publishing Services in CD format only and will be available at the conference.

PAPER SUBMISSIONS:
Authors are invited to submit manuscripts reporting original
unpublished research and recent developments in the topics
related to the workshop. Submitted papers should be formatted
according to the IEEE standard double-column format with a font
size 10 pt or larger and should not
exceed 8 pages including figures and references. Papers should
be submitted electronically in PDF format (or postscript) at
http://www.easychair.org/conferences/?conf=srmpds10. All papers
will be peer reviewed and the comments will be provided to the authors.

SUBMISSIONS PAGE:
http://www.easychair.org/conferences/?conf=srmpds2014

IMPORTANT DATES:
Submissions Due:      Apr 14, 2014
Review Decisions:     May 12, 2014
Final Manuscript Due: Jun 15, 2014

PROGRAM CHAIR:
Rajkumar Kettimuthu (Argonne National Laboratory and University of Chicago, USA)

PROGRAM COMMITTEE:
Sanjeev Agarwal (Indian Institute of Technology Kanpur, India)
Rajdeep Bhowmik (Cisco Systems, Inc, USA)
Surendra Byna (Lawrence Berkeley National Laboratory, USA)
Massimiliano Caramia (University of Rome "Tor Vergata", Italy)
Julita Corbalan (Barcelona Supercomputing Center, Spain)
Tae-Young Choe (Kumoh National Institute of Technology, Korea)
Maciej Drozdowski (Poznan University of Technology, Poland)
Eitan Frachtenberg (Facebook, USA)
Alfredo Goldman (University of Sao Paulo, Brazil)
William Jones (Coastal Carolina University, USA)
Eun-Sung Jung (Argonne National Laboratory, USA)
Hiroshi Koide (Kyushu Institute of Technology, Japan)
Shikharesh Majumdar (Carleton University, Canada)
Aleardo Manacero Jr. (Sao Paulo State University, Brazil)
Serge Midonnet (University of Marne La Vallee, France)
Nandini Mukherjee (Jadavpur University, India)
Vijay Naik (IBM, USA)
Chanik Park (Pohang University of Science and Technology, Korea)
Rajiv Ranjan (The University of Melbourne, Australia)
Morris Riedel (Research Center Julich, Germany)
Michael Sobolewski (Texas Tech University, USA)
Achim Streit (Karlsruhe Institute of Technology, Germany)
Dina Sulakhe (The University of Chicago, USA)
Wei Tang (Argonne National Laboratory, USA)
Yongwei Wu (Tsinghua University, China)
Philipp Wieder (GWDG, Germany)
Ramin Yahyapour (University of Dortmund, Germany)

PUBLICITY COORDINATOR:
Wei Tang (Argonne National Laboratory, USA)

ADDITIONAL INFORMATION:
www.mcs.anl.gov/~kettimut/srmpds<http://www.mcs.anl.gov/~kettimut/srmpds> or send email to srmpds@mcs.anl.gov<mailto:srmpds@mcs.anl.gov>