CFP - CrossCloud'17

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============================ Call for Papers ==========================

                              CrossCloud'17
      The 4th Workshop on CrossCloud Infrastructures & Platforms
                       http://bit.ly/CrossCloud

                             April 23, 2017

   Co-located with European Conference on Computer Systems (EuroSys'17)
                  April 23-26, 2017 - Belgrade, Serbia

                                (Submission deadline: January 30, 2017)

=======================================================================
SCOPE

CrossCloud is  an  international workshop series that aims to bring to
light  several issues related to cross-cloud systems: cloud federation,
multi-cloud architectures, cross-cloud applications, and hybrid clouds.

CrossCloud aims to attract researchers from  both academia and industry
to share and discuss their recent research and experiences in designing
and  operating   multiple  cloud   systems. Work  in  this area extends
over    various  topics  including  cross-cloud   resource  management,
monitoring,  service   migration,  API  interoperability,  portability,
policy enforcement, benefit–cost analysis, and fault mitigation.

=======================================================================
TOPICS OF INTERESTS

Authors  are  invited  to  submit  papers covering, but not limited to,
the following topics:

- Cross-cloud  systems:  resource  management  across  multiple  clouds
(e.g., load balancing,  performance  optimization, security and privacy
policy enforcement).

- Containers and Virtual Machine (VM) management across  several  cloud
infrastructures (e.g., VM placement and migration).

- Fog/edge computing: fog-based infrastructures,  caching,  performance
and services.

- Micro-services:  system  design,   monitoring  and  management  using
 containers and/or microkernels to achieve cloud provider independence.

- Cross-Cloud agility: dynamic  application deployment across  multiple
cloud  platforms,  flexibility  in  moving  between different providers
and vendors.

- Hybrid cloud infrastructures management: public  and  private clouds,
heterogeneous cloud systems, cloud and cluster/grid systems.

- Cloud-bursting: workload offloading, multi-cloud resource  scheduling
strategies.

- Cross-cloud  SDKs  and  APIs:  design,   maintenance,   support   and
performance evaluation.

- Application  portability:  priorities,  restrictions,  and    lock-in
mitigation techniques and measures.

- API interoperability:  study  cases  and  experiences  with  data and
applications.

- Interoperability  between   managed  services (e.g.,  MapReduce,  DB,
message queues, etc.).

- Decision support systems: efficient  and  open application deployment
and monitoring across different cloud platforms  and  providers,  cloud
brokerage as a means of complexity outsourcing.

- Scalable multi-cloud  monitoring: monitoring  among  different  cloud
environments,  relevant  metrics  at  the different levels of the stack
(e.g., network access), monitoring overhead analysis.

- Experiences:  assembling  and  (re)deploying  in heterogeneous multi-
cloud  environments,  costs  and  benefits  of  cross-cloud  management
and  deployment,  challenges  in  existing  cross-cloud platforms, case
studies on building or federating multi-cloud systems.

- Cross-Cloud security:  identity    and   access   management   across
infrastructure boundaries, reconciling application security and privacy
requirements across multiple SLAs.

=======================================================================
IMPORTANT DATES

Paper submission: January 30, 2017
Author notification: February 28, 2017
Camera-ready version: March 31, 2017
 All deadline times are Anywhere on Earth.

=======================================================================
SUBMISSION GUIDELINE

We  solicit  two  types  of  submissions:  (1)  technical  papers  (max
6 double-column pages), and (2) posters (max  2  double-column  pages).
Each  submission  will  receive  at  least 3 single-blind peer reviews.
Authors  of  technical  papers are also encouraged to prepare a  poster
to be displayed in the workshop's poster sessions.

=======================================================================
JOURNAL SPECIAL ISSUE

Like in  the former  editions  of  the workshop, authors  of  the  best
technical papers will be invited to submit an extended version of their
work to the Springer Open Journal of Internet Services and Applications
thematic series on cross-cloud computing (JISA-CCC).

=======================================================================
ORGANIZATION

General and Technical Program Co-Chairs:
    Yehia Elkhatib (Lancaster University, UK)
    Mohamed Faten Zhani (École de Technologie Supérieure, Canada)

Steering Committee:
    Gordon S. Blair (Lancaster University, UK)
    Raouf Boutaba (University of Waterloo, Canada)

Publicity Co-chairs:
    Michele Nogueira (Federal University of Parana, Brazil)
    Walter Cerroni (University of Bologna, Italy)

=======================================================================
CONTACT

CrossCloudRsrch@gmail.com

http://bit.ly/CrossCloud
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CGO 2017 -- Early bird registration about to expire!

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Call for Participation: International Symposium on Code Generation and Optimization (CGO) 2017
http://cgo.org/cgo2017/

(Co-located with HPCA and PPoPP)

February 4-8, 2017
Austin, Texas USA

The International Symposium on Code Generation and Optimization (CGO) provides a premier venue to bring together researchers and practitioners working at the interface of hardware and software on a wide range of optimization and code generation techniques and related issues. The conference spans the spectrum from purely static to fully dynamic approaches, and from pure software-based methods to specific architectural features and support for code generation and optimization.

The program will feature 26 technical papers, 27 co-located workshops and tutorials, and 3 keynote speeches!

Important links:

Registration, at discounted rates through January 6th:
https://www.regonline.com/builder/site/?eventid=1841528

For discounted hotel rates, also through January 11th:
http://cgo.org/cgo2017/travel-information.html#hotel-info

Student travel support is available:
http://cgo.org/cgo2017/travel-grants.html

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CFP - The First international workshop on Software Defined Networks and Network Function Virtualization (SDN-NFV 2017)

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The First international workshop on Software Defined Networks and Network Function Virtualization (SDN-NFV 2017)

In conjunction with The Fourth International Conference on Software Defined Systems (SDS-2017)

Valencia, Spain. May 8-11, 2017

http://emergingtechnet.org/SDN-NFV2017/

Call For Papers:

The emerging networking techniques such as Software Defined Network (SDN) and Network Function Virtualization (NFV) are promising a complete paradigm shift in how we manage our future networks. With their enormous benefits which include reducing the operational cost, better resources utilization and easier management requirements, the adoption of such technologies is gaining momentum. Supported by a well-defined basis such as network virtualization and the decoupling of the data and control planes, the integration of SDN and NFV with current systems might be a straightforward process. However, this might incur many challenges which require deep analysis to propose creative solutions. In the (SDN-NFV 2017) workshop, we are aiming to invite researchers from both the academia and the industry to present their state of the art research efforts and findings and to open the doors for discussion about how to contribute of the advancement of this important research field.

The First International workshop on Software Defined Network and Network Function Virtualization (SDN-NFV) will be a forum for scientists, researchers, students, and practitioners to present their latest research results, ideas, developments, and applications in the areas of SDN, NFV, 5G, Internet of Things (IoT) and Edge Computing . We are mainly interested in receiving state of the art work on different aspect of SDN and NFV management system, security and privacy, cloud computing and big data supported SDN and NFV, to mention but few.

The topics of interest for this workshop include, but are not limited to:

• Software Defined Network (SDN) Architectures and Design
• Network Function Virtualization (NFV) Architectures and Design
• SDN-NFV Integration
• SDN-NFV Orchestration
• SDN-NFV Based Control plane design
• SDN-NFV Based Data plane design
• SDN-NFV Performance Management
• SDN-NFV support for Cloud based DataCenter
• SDN-NFV support for 5G Networks
• SDN-NFV support for Internet of Things (IoT)
• SDN-NFV support for Big Data Computing
• SDN-NFV support for large scale storage system
• Hardware system design for SDN-NFV
• SDN-NFV Security management
• Radio Access Network virtualization
• SDN-NFV in access networks
• Edge and Fog Computing
• Cloud Computing
• Case studies

Important Dates:

Submission Date: 30 January. 2017

Notification to Authors: 15 March 2017

Camera Ready Submission: 1 April 2017

Instructions for Authors

Prospective authors are invited to submit full papers of up to 6 pages, strictly following the IEEE Proceedings Templates. Submitted papers will be peer-reviewed and prospective authors are expected to present their papers at the conference. The papers that are accepted and presented at the conference will appear in conference proceedings and will be submitted for IEEE. At least one author of each accepted submission must attend the workshop and that every workshop participant must register and present the paper.

Please submit your paper in PDF format via the electronic submission system

Organizing Committee

General Co-chairs

    Ahmed E. Kamal, Iowa State University, USA

    Luis Veiga, Technical University of Lisbon, Portugal

Technical Program Co-chairs

    Zilong Ye, California State University, Los Angeles, USA

    Mohammad Fraiwan Jordan University of Science and Technology

Publication and Publicity Co-chairs

    Abdallah Khreishah, New Jersey Institute of Technology, USA

    Elhadj Benkhelifa, Staffordshire University, UK

Please send any inquiry on SDN-NFV to Zilong Ye:  zye5@calstatela.edu

Thanks.

Zilong Ye, Ph.D.
Assistant Professor, Department of Computer Science
California State University, Los Angeles
5151 State University Drive, Los Angeles, CA 90032

T (323)343-6689 | zye5@calstatela.edu

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International Journal of Data Mining & Knowledge Management Process ( IJDKP )

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International Journal of Data Mining & Knowledge Management Process ( IJDKP )
ISSN : 2230 - 9608[Online] ; 2231 - 007X [Print]
http://airccse.org/journal/ijdkp/ijdkp.html
Scope & Topics

Data mining and knowledge discovery in databases have been attracting a significant amount of research, industry, and media attention of late. There is an urgent need for a new generation of computational theories and tools to assist researchers in extracting useful information from the rapidly growing volumes of digital data.

This Journal provides a forum for researchers who address this issue and to present their work in a peer-reviewed open access forum. Authors are solicited to contribute to the Journal by submitting articles that illustrate research results, projects, surveying works and industrial experiences that describe significant advances in the following areas, but are not limited to these topics only.

Topics of interest include, but are not limited to the following

Data mining foundations

Parallel and Distributed Data Mining Algorithms, Data Streams Mining, Graph Mining, Spatial Data Mining, Text video, Multimedia Data Mining, Web Mining,Pre-Processing Techniques, Visualization, Security and Information Hiding in Data Mining

Data mining Applications

Databases, Bioinformatics, Biometrics, Image Analysis, Financial Modeling, Forecasting, Classification, Clustering, Social Networks, Educational Data Mining

Knowledge Processing

Data and Knowledge Representation, Knowledge Discovery Framework and Process, Including Pre- and Post-Processing, Integration of Data Warehousing, OLAP and Data Mining, Integrating Constraints and Knowledge in the KDD Process , Exploring Data Analysis, Inference of Causes, Prediction, Evaluating, Consolidating and Explaining Discovered Knowledge, Statistical Techniques for Generation a Robust, Consistent Data Model, Interactive Data Exploration/Visualization and Discovery, Languages and Interfaces for Data Mining, Mining Trends, Opportunities and Risks, Mining from Low-Quality Information Sources

Paper submission

Authors are invited to submit papers for this journal through e-mail ijdkpjournal@airccse.org. Submissions must be original and should not have been published previously or be under consideration for publication while being evaluated for this Journal.
Important Dates

• Submission Deadline : December 25, 2016
• Notification                 : January 25, 2017
• Final Manuscript Due    : February 03, 2017
• Publication Date          : Determined by the Editor-in-Chief

For other details please visit http://airccse.org/journal/ijdkp/ijdkp.html
Contact Us

Here's where you can reach us : ijdkpjournal@yahoo.com or ijdkpjournal@airccse.org

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[CFP] HLPP'2017 - The 10th International Symposium on High-Level Parallel Programming and Applications

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Please, feel free to resubmit this call for papers to your colleagues or any other person or institution if you think they could be interested.

-------------------------------------------------------

CALL FOR PAPERS

HLPP 2017

The 10th International Symposium on High-Level Parallel Programming and Applications

July 10 - 11, 2017
Valladolid, Spain

Web: https://hlpp2017.infor.uva.es/
email: hlpp2017@infor.uva.es

== Aims and scope of HLPP ==

As processor and system manufacturers increase the amount of both inter- and intra-chip parallelism, it becomes crucial to provide the software industry with high-level, clean and efficient tools for parallel programming. Parallel and distributed programming methodologies are currently dominated by low-level techniques such as send/receive message passing, or equivalently unstructured shared memory mechanisms. Higher-level, structured approaches offer many possible advantages and have a key role to play in the scalable exploitation of ubiquitous parallelism.

Since 2001, the HLPP series of workshops/symposia has been a forum for researchers developing state-of-the-art concepts, tools, and applications for high-level parallel programming. The general emphasis is on software quality, programming productivity, and high-level performance models. The 10th Symposium on High-Level Parallel Programming and Applications will be held July 11-12th in the cultural city of Valladolid, Spain.

== Topics ==

HLPP 2017 invites papers on all topics in high-level parallel programming, its tools and applications including, but not limited to, the following aspects:

 * High-level programming, performance models (BSP, CGM, LogP, MPM,
   etc.) and tools
 * Declarative parallel programming methodologies based on functional,
   logical, data-flow, and other paradigms
 * Algorithmic skeletons, patterns, etc., and constructive methods
 * High-level parallelism in programming languages and libraries (e.g,
   Haskell, Scala, etc.): semantics and implementation
 * Verification of declarative parallel and distributed programs
 * Efficient code generation, auto-tuning, and optimization for
   parallel programming
 * Model-driven software engineering for parallel systems
 * Domain-specific languages: design, implementation, and applications
 * High-level programming models for heterogeneous/hierarchical
   platforms with accelerators; e.g. GPU, Xeon Phi, etc.
 * High-level parallel methods for large structured and semi-structured
   datasets
 * Applications of parallel systems using high-level languages and tools
 * Teaching experience with high-level tools and methods


== Important dates ==

 * Submission deadline: *April 1*
 * Author notification: *May 8*
 * Camera-ready paper due for draft proceedings: *June 9*
 * Early registration deadline: *May 31*
 * Late registration deadline: *June 30* (after this date the
   registration will be only possible paying by cash at the
   registration desk during the symposium)
 * Symposium: *July 10-11*
 * Camera-ready paper due for journal publication: *September 15*


== Paper submission ==

Papers submitted to HLPP2017 must describe original research results and must not have been published or simultaneously submitted anywhere else. Manuscripts must be prepared with the Springer IJPP Latex macro package <http://static.springer.com/sgw/documents/468198/application/zip/LaTeX.zip>, using the single column option (\documentclass[smallextended]{svjour3}), and submitted via the EasyChair Conference System <https://easychair.org/my/conference.cgi?conf=hlpp2017>, as one PDF file. The strict page limit for initial submission and camera-ready version is 18 pages in the aforementioned format. Each paper will receive a minimum of three reviews by members of the program committee. Papers will be selected based on their originality, relevance, technical clarity, and quality of presentation. At least one author of each accepted paper must register for the HLPP 2017 symposium and present the paper. After the symposium, you have ample time to revise the paper incorporating potential comments and remarks of your colleagues.

== Proceedings and Journal Special Issues ==

Accepted papers will be distributed as informal draft proceedings during the symposium. Additionally, accepted papers will be published in a special issue of a renowned international journal. Depending on their subject, some papers will be selected for the *International Journal of Parallel Programming* (Springer), while others will be selected for *Concurrency and Computation: Practice and Experience*(Wiley). We expect the special issues to appear online-first by the end of 2017 and the printed edition in 2018.


== Organization Committee ==

 * Arturo Gonzalez-Escribano, Universidad de Valladolid, Spain
 * Diego R. Llanos, Universidad de Valladolid, Spain
 * Daniel Barba-Gutierrez, Universidad de Valladolid, Spain
 * Ana Moreton-Fernandez, Universidad de Valladolid, Spain
 * Eduardo Rodriguez-Gutiez, Universidad de Valladolid, Spain


== Program committee ==

 * Chair: José Daniel García (Universidad Carlos III de Madrid, Spain)
 * Herbert Kuchen (University of Muenster)
 * Aleksandar Prokopec (École Polytechnique Fédérale de Lausanne)
 * Kostis Sagonas (Uppsala University)
 * Massimo Torquati (University of Pisa)
 * Pedro Alonso (Universitat Politècnica de València)
 * Christoph Kessler (Linköping University)
 * Murray Cole (University of Edinburgh)
 * Susanna Pelagatti (University of Pisa)
 * Michel Steuwer (The University of Edinburgh)
 * Clemens Grelck (University of Amsterdam)
 * Gaétan Hains (Huawei France, R&D Center)
 * Dora Blanco (University of Santiago de Compostela)
 * Marco Danelutto (University of Pisa)
 * Peter Kilpatrick (Queen¿s University Belfast)
 * Marco Aldinucci (University of Pisa)
 * Kiminori Matsuzaki (Kochi University of Technology)
 * Arturo Gonzalez-Escribano (Universidad de Valladolid)
 * Diego R. Llanos (Universidad de Valladolid)


== HLPP steering committee ==

 * Clemens Grelck (Universiteit van Amsterdam, Netherlands)
 * Gaétan Hains (Université Paris-Est, France)
 * Kiminori Matsuzaki (Kochi University of Technology, Japan)
 * Frédéric Loulergue (SICCS, Northern Arizona University, USA)
 * Quentin Miller (Somerville College Oxford, United Kingdom)
 * Alexander Tiskin (University of Warwick, United Kingdom)


== Venue ==

HLPP 2017 will be hosted by Universidad de Valladolid, Spain
The symposium will be held at "Palacio de Congresos Conde Ansurez"

-------------------------------------------------------


Kind regards,
The HLPP'2017 local organization committee


--
--
-- HLPP'2017. Local Organization Committee
-- Universidad de Valladolid (Spain)
-- http://hlpp2017.infor.uva.es/

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Call for Submissions: Job Scheduling Strategies for Parallel Processing 2017

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Call for Submissions - jsspp.org

The JSSPP workshop addresses all scheduling aspects of parallel processing, including cloud, grid (HPC) as well as “mixed/hybrid” or otherwise specific systems.

Large parallel systems have been in production for more than 20 years, creating the need of scheduling for such systems. Since 1995, JSSPP provides a forum for the research and engineering community working in the area. Initially, parallel systems were very static, with machines built in fixed configurations, which would be wholesale replaced every few years. Similarly, much of the workload was static as well, consisting of parallel scientific jobs running on a fixed number of nodes. Systems were primarily managed via batch queues. The user experience was far from interactive; jobs could wait in queues for days or even weeks.

A little over 10 years ago, the emergence of large scale, interactive, web applications together with the massive virtualization began to drive the development of a new class of (cloud) systems and schedulers. These systems would use virtual machines and/or containers to run "services", which would essentially never terminate (unlike scientific jobs). This created systems and schedulers with vastly different properties. Moreover, the enormous demand for computing resources resulted in a commercial market of competing providers. At the same time, the increasing demands for more power and interactivity have driven scientific platforms in a similar direction, causing the lines between these platforms to blur.

Nowadays, parallel processing is much more dynamic and connected. Many workloads are interactive and make use of variable resources over time. Complex parallel infrastructures can now be built on the fly, using resources from different sources, provided with different prices and quality of services. Capacity planning became more proactive, where resources are acquired continuously, with the goal of staying ahead of demand. The interaction model between job and resource manager is shifting to one of negotiation, where they agree on resources, price, and quality of service. Also, “hybrid” systems are often used, where the (virtualized) infrastructure is hosting a mix of competing workloads/applications, each having its own resource manager, that must be somehow co-scheduled. These are just a few examples of the open issues facing our field.

From its very beginning, JSSPP has strived to balance practice and theory in its program. This combination provides a rich environment for technical debate about scheduling approaches including both academic researchers as well as participants from industry. JSSPP is a high-visibility workshop, which has been ranking repeatedly in the top 10% of Citeseer's venue impact list.

Building on this tradition, starting this year, JSSPP also welcomes descriptions of open problems in large scale scheduling. Lack of real-world data substantially often hampers the ability of the research community to engage with scheduling problems in a way that has real world impact. Our goal in this new venue is to build a bridge between the production and research worlds, in order to facilitate direct collaborations and impact.

Call for Papers

JSSPP solicits papers that address any of the challenges in parallel scheduling, including:

• Design and evaluation of new scheduling approaches.
• Performance evaluation of scheduling approaches, including methodology, benchmarks, and metrics.
• Workloads, including characterization, classification, and modeling.
• Consideration of additional constraints in scheduling systems, like job priorities, price, accounting, load estimation, and quality of service guarantees.
• Impact of scheduling strategies on system utilization, application performance, user friendliness, cost efficiency, and energy efficiency.
• Scaling and composition of very large scheduling systems.
• Cloud provider issues: capacity planning, service level assurance, reliability.
• Interaction between schedulers on different levels, like processor level as well as whole single- or even multi-owner systems
• Interaction between applications/workloads, e.g., efficient batch job and container/VM co-scheduling within a single system, etc.
• Experience reports from production systems or large scale compute campaigns.

Call for Problems

JSSPP also welcomes descriptions of open problems in large scale scheduling. Effective scheduling approaches are predicated on three things:

• A concise understanding of scheduling goals, and how they relate to one another.
• Details of the workload (job arrival times, sizes, shareability, deadlines, etc.)
• Details of the system being managed (size, break/fix lifecycle, allocation constraints)

Submissions must include concise description of the key metrics of the system and how they are calculated, as well as anonymized data publication of the system workload and production schedule. Detailed descriptions of operational considerations (maintenance, failure patterns, fault domains) are also important. Ideally, anonymized operational logs would also be published, though we understand this might be more difficult. Scripts to evaluate results and compute the metrics relevant for the system are highly encouraged.

We envision that these papers will provide sufficiently detailed information to be able to develop new scheduling approaches, which can be robustly compared with the schedules used in production facilities, and other approaches to solve the same problems.

---

For further information concerning paper formatting instructions please visit the Submission section.

Author submission deadline: February 1st, 2017

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EURO-PAR 2017: CALL FOR WORKSHOP PROPOSALS

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*****************************************************************************

*** EURO-PAR 2017: CALL FOR WORKSHOP PROPOSALS ***

*****************************************************************************

23rd International European Conference on Parallel and Distributed Computing

Santiago de Compostela, Spain, from August 28th to September 1st, 2017

http://europar2017.usc.es/

Twitter: @europar2017

Important Dates

===============

For Workshop Organizers

~~~~~~~~~~~~~~~~~~~~~~~

- Workshop proposal due:  3 February 2017

- Workshop notifications: 24 February 2017

- Workshop website online and launch of Call for Workshop Papers: 20 March 2017

- Workshop dates: 28-29 August 2017

- Workshop management report due: 3 October 2017

Scope

=====

Euro-Par is the prime European conference covering all aspects of parallel and distributed processing, ranging from theory to practice, from small to the largest parallel and distributed systems and infrastructures, from fundamental computational problems to full-fledged applications, from architecture, compiler, language and interface design and implementation, to tools, support infrastructures, and application performance aspects. To provide a meeting point for researchers to discuss and exchange new ideas and hot topics related to parallel and distributed computing, Euro-Par 2017 will co-locate workshops with the main conference and invites proposals for the workshop program.

More details and guidelines for submission of proposals are available at the web site: http://europar2017.usc.es/#workshops

Workshop Co-Chairs

==================

- Dora Blanco Heras, CiTIUS, University of Santiago de Compostela, Spain

- Luc Bougé, ENS Rennes, France

-----------------

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Reconfigurable Architectures Workshop (RAW) 2016 CFP: Abstract Deadline Jan. 11

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                  CALL FOR PAPERS

__________________________________________________________________

     24th Reconfigurable Architectures Workshop

     RAW 2017             

Buena Vista Palace Hotel          

Orlando, Florida, USA, May 29-30 2017

__________________________________________________________________

QUICK LINK: Web site: http://raw.necst.it/

IMPORTANT DATES: Abstract submission January 11, 2017

                                 Submission deadline January 15, 2017

                                 Decision notification February 17, 2017

__________________________________________________________________

The 24th Reconfigurable Architectures Workshop (RAW 2017) will be 

held in Orlando, Florida USA in May 2017. RAW 2017 is associated 

with the 31st Annual IEEE International Parallel & Distributed 

Processing Symposium (IEEE IPDPS 2017) and is sponsored by the 

IEEE Computer Society and the Technical Committee on Parallel 

Processing. The workshop is one of the major meetings for 

researchers to present ideas, results, and on-going research on 

both theoretical and practical advances in Reconfigurable Computing.

A reconfigurable computing environment is characterized by the 

ability of underlying hardware architectures or devices to rapidly 

alter (often on the fly) the functionalities of their components 

and the interconnection between them to suit the problem at hand. 

The area has a rich theoretical tradition and wide practical 

applicability. There are several commercially available 

reconfigurable platforms (FPGAs and coarse-grained devices) and many 

modern applications (including embedded systems and HPC) use 

reconfigurable subsystems. An appropriate mix of theoretical 

foundations and practical considerations, including algorithms 

architectures, applications, technologies and tools, is essential to 

fully exploit the possibilities offered by reconfigurable computing. 

The Reconfigurable Architectures Workshop aims to provide a forum for 

creative and productive interaction for researchers and practitioners 

in the area. 

__________

SUBMISSION OF PAPERS

All manuscripts will be reviewed by at least three members of the 

program committee. Submissions should be a complete manuscript or, 

in special cases, may be a summary of relevant work. Manuscript for 

full paper should be not exceed 8 single-spaced, double-column pages 

using 10-point size font on 8.5X11 inch pages (IEEE conference style) 

including references, figures and tables. Manuscript for short papers

should be not exceed 4 single-space, double-column pages.

Papers are to be submitted through EasyChair. Submitted papers should 

not have appeared in or be under consideration for a different workshop, 

conference or journal. It is also expected that all accepted papers

(regular or short) will be presented at the workshop by one of the 

authors. 

All papers must be submitted electronically in PDF format.

Submissions can be made through:

. the RAW2017 web site: http://raw.necst.it/ 

. EasyChair: https://easychair.org/conferences/?conf=raw2017

___________

IMPORTANT DATES

Abstract submission January 11, 2017

Submission deadline January 15, 2017

Decision notification February 17, 2017 Conference: May 29-30, 2017

___________

KEYNOTE

Ronald F. DeMara, Director of Computer Architecture Laboratory, University of Central Florida

Georgi Gaydadjiev, VP of Dataflow Software Engineering, Maxeler Technologies Ltd

___________

TOPICS OF INTEREST

    Hot Topics in Reconfigurable Computing

Configurable Cloud

Heterogeneous Computing in Data Centers

Accelerating Data Center Workloads

FPGA-based Deep Learning

Accelerating Genomic Computations

Acceleration of Data Analytics

  Reconfigurable Computing in the IoT era

Organic Computing, Biology-Inspired Solutions

Applications in Finance

    Architectures & CAD

Algorithmic Techniques and Mapping

Emerging Technologies (optical models, 3D Interconnects, devices)

Reconfigurable Accelerators

Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)

FPGA-based MPSoC and Multicore

Distributed Systems & Networks

Wireless and Mobile Systems

Critical issues (Security, Energy efficiency, Fault-Tolerance)

    Runtime & System Management

Run-Time Reconfiguration Models and Architectures

Autonomic computing systems

Operating Systems and High-Level Synthesis

High-Level Design Methods (Hardware/Software co-design, Compilers)

System Support (Soft processor programming)

Runtime Support

Reconfiguration Techniques

Simulations and Prototyping (performance analysis, verification tools)

___________

ORGANIZERS

Workshop Chairs

Marco D. Santambrogio, Politecnico di Milano, Italy

Ramachandran Vaidyanathan, Louisiana State University, USA

Program Chairs

Diana Goehringer, Ruhr-University Bochum, Germany

Donatella Sciuto, Politecnico di Milano, Italy

Program Vice Chairs

Dirk Stroobandt, Ghent University, Belgium

Francesca Palumbo, Università di Sassari, Italy

Ann Gordon-Ross, University of Florida, USA

Steering Committee

Juergen Becker, Karlsruhe Insttute of Technology, Germany

Viktor K. Prasanna, University of Southern California, USA

Ramachandran Vaidyanathan, Louisiana State University, USA

Publicity

Brian Veale, IBM, USA

Ivan Beretta, University of Westminster, UK

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Call for papers: EduPar-17 @ IPDPS, Orlando - 7th NSF/TCPP Workshop on Parallel and Distributed Computing Education

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7th NSF/TCPP Workshop on Parallel and Distributed Computing Education (EduPar-17)

                                                                  In conjunction with
                          31st IEEE International Parallel & Distributed Processing Symposium,
                                               May 29-June 2, 2017, Orlanda, Florida, USA

                                                    

            

                                       Website: http://cs.gsu.edu/~tcpp/curriculum/?q=edupar17

CALL FOR PAPERS

Parallel and Distributed Computing (PDC) now permeates most computing activities. The pervasiveness of computing devices that contain multicore CPUs and GPUs is making even common users depend on parallel processing. The ever increasing use of web-based services and emerging applications, such as cloud computing, big data analytics, and the Internet of Things, is weaving high performance computing (HPC) and distributed computing into the fabric of modern society.  Traditional sequential programming skills are no longer sufficient even for basic programmers. These changes in the computing landscape point to the need for providing a broad-based skill set in PDC technology at various levels in the educational fabric woven by Computer Science (CS) and Computer Engineering (CE) programs as well as related computational disciplines.  However, the rapid changes in hardware platforms, devices, languages, and supporting programming environments continue to challenge educators in ascertaining appropriate content for curriculum and how to teach that content effectively.

The 7th EduPar workshop invites unpublished manuscripts from academia, industry, and research institutes on topics pertaining to the teaching of PDC/HPC topics. The emphasis of the 7th workshop continues to be on undergraduate education, although certain aspects of graduate education, if relevant to undergraduates, may be considered at the discretion of the program committee.  The workshop especially seeks papers that report on experience with implementing aspects of the NSF/TCPP or ACM/IEEE CS2013 curriculum or other novel approaches to incorporating PDC topics into undergraduate core courses that are taken by the majority of students in a program. Methods, pedagogical approaches, tools, and techniques that have the potential for adoption across the broader community are of particular interest.

This effort is in coordination with the TCPP curriculum initiative (http://www.cs.gsu.edu/~tcpp/curriculum) for CS/CE undergraduates supported by NSF and its NSF-supported Center for Parallel and Distributed Computing Curriculum Development and Educational Resources (CDER).

The topics of interest include, but are not limited to:

1. Pedagogical issues and novel ways of teaching PDC topics, including informal learning environments
2. Models for incorporating PDC topics in core CS/CE and domain computational science and engineering curricula
3. Experience with integrating PDC topics into core CS/CE and domain computational science and engineering courses and applying the learning experience in other contexts
4. Pedagogical tools, programming environments, and languages for PDC
5. Employers’ experiences with and expectation of the level of PDC proficiency among new graduates.
6. Issues and experiences to address gender gap and broadening participation of underrepresented groups (both students and educators) in PDC.
7. Teaching of HPC and Big Data Analytics across STEM disciplines
8. Incorporating PDC/HPC topics in computing literacy and AP computer science course

SUBMISSION GUIDELINES: Authors are asked to submit 6-8 page papers in pdf format at the EasyChair submission site https://www.easychair.org/conferences/?conf=edupar17.  Submissions should be formatted as single-spaced double-column pages using 10-point font on 8.5x11 inch pages (IEEE conference style), including figures, tables, and references. See style templates for details.

Submissions will be reviewed based on the novelty of contributions, impact on broader undergraduate curriculum, particularly on core curriculum, relevance to the workshop, and, for experience papers, the results of their evaluation and the evaluation methodology. 

Proceedings of the workshops are distributed at the conference and are submitted for inclusion in the IEEE Xplore Digital Library after the conference.

LaTex Package

Word Template

IMPORTANT DATES:

• January 13, 2017: Abstract Submission (encouraged)
• January 20, 2017: Full paper due
• February 20, 2017: Author notification
• February 28: Camera-ready paper due 

ORGANIZATION:

     Workshop Chair:  Sushil K. Prasad (Georgia State University)

     Program Chair: Sheikh Ghafoor (Tennessee Tech)  

     Proceedings Chair:  Satish Puri (Marquette University)

Keynote Speaker : Jack Dongarra, University of Tennessee  

Program Committee (Tentative)

     Ramchandran Vaidyanthan, Louisiana State University

     Ioana Banicescu, Mississippi State University

     Martina Barnas, Indiana University Bloomington

     Jeffrey Carver, University of Alabama

     Niloy Ganguly, Indian Institute of Technology Kharagpur

     Victor Gergel, Nizhni Novgorod State University

     Nasser Giacaman, The University of Auckland

     Domingo Gimenez, University of Murcia

     Anshul Gupta, IBM Research

     David Kaeli, Northeastern University

     Kishore Kothapalli, International Institute of Information Technology, Hyderabad

     Krishna Kant, Temple University

     Andrew Lumsdaine, Indiana University

     Peter Pacheco, University of San Francisco

     Manish Parashar, Rutgers University

     Cynthia Phillips, Sandia National Laboratories

     Sushil Prasad, Georgia State University

     Noemi Rodriguez, PUC-Rio

     Krishnendu Roy, Valdosta State University

     Jawwad Shamsi, FAST National University of Computer and Emerging Sciences

     Rudrapatna Shyamasundar, Indian Institute of Technology, Mumbai

     Violet Syrotiuk, Arizona State University

     Jerry Trahan, Louisiana State University

     Frédéric Vivien, INRIA

     Michael Wrinn, Intel

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