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==================================== Call for Papers (Deadline Extension) ============================== ====== International DATE 2017 Friday Workshop on * Emerging Memory Solutions Technology, Manufacturing, Architectures, Design and Test * Lausanne, Switzerland Friday March 31, 2017 https://ems.eit.uni-kl.de/en/ ems-workshop The Design, Automation, and Test in Europe conference and exhibition is the main European event bringing together researchers, vendors and specialists in hardware and software design, test and manufacturing of electronic circuits and systems. Friday Workshops are dedicated to emerging research and application topics. At DATE 2017, one of the Friday Workshops is devoted to Emerging Memory Solutions. This one-day event consists of plenary keynotes, regular and poster presentations, and a panel session. Important Dates (update): ========================= * Paper Submission Deadline January 09, 2017 * Notification of Acceptance January 16, 2017 Camera-Ready Material due date February 28, 2017 Scope of the Workshop --------------------- Memory manufacturing, architectures, design and test were deeply investigated to face issues linked to technology scaling such as increasing static power, maximum operating frequency and the gap between logic and memory minimum voltages. Various emerging memories solutions have appeared in recent years to replace either partially or totally already existing memories with an aim to overcome both technology and design related limitations in order to answer the requirements of many different applications. The goal of this Workshop is to bring together researchers, practitioners, and others interested in this exciting and rapidly evolving field, in order to update each other on the latest state-of-the-art, exchange ideas, and discuss future challenges. Topic Areas ----------- You are invited to participate and submit your contributions to DATE 2017 Friday Workshop on Emerging Memory Solutions. The areas of interest include (but are not limited to) the following topics: • Volatile memory design (SRAM, DRAM, CAM, etc.) • Non-Volatile memory design (ReRAM, Flash, PCM, MRAM, etc.) • Applications of emerging devices in memories (TFETs, CNTs, nanowires, etc.) • 3D memories (volatile and non-volatile) • Processing in Memory • In-memory computing • Memory Application for emerging markets • Memory test, BIST and debug techniques • Applications, products, and prototypes of new memories Submission Instructions ======================= Submissions are invited in the form of (extended) abstracts not exceeding two pages and must be sent in as PDF file to <bastien.giraud@cea.fr> with “DATE17-EMS-WS” as subject. All submissions will be evaluated for selection with respect to their suitability for the workshop, originality, and technical quality. Selected submissions will be accepted for oral or poster presentation. At the workshop, an Electronic Workshop Digest will be made available to all workshop participants, which will include all material that authors are willing to provide: abstract, paper, slides, poster, etc. Authors of the extended abstract are at liberty to submit a full version of their work to other conferences and to journals without violating common codes of ethics. Selected works will be invited to submit a full paper to MEMSYS Europe (www.memsys.io). Looking forward to your submission. The organizers, Christian Weis, University of Kaiserslautern Bastien Giraud, CEA-LETI
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