LIVE CUDA PERFORMANCE WEBINAR, TRY A TESLA K20 GPU ACCELERATOR – FREE

TRY A TESLA K20 GPU ACCELERATOR – FREE
Run your own application on the NVIDIA® Tesla® K20 GPU Accelerator - the world’s fastest GPU accelerator – for free.  Simply register at www.nvidia.com/gputestdrive and see yourapp speedup by up to 10x.

LIVE CUDA PERFORMANCE WEBINAR
Join us for our next GTC Express Webinar which provides an overview of CUDA 5 math library performance on the latest Tesla K20 GPU Accelerator and your chance to meet the engineering team behind these libraries. February 6th, 10am (PST), CUDA 5 Math Library Performance Overview

Learn advanced development techniques at NVIDIA’s GPU Technology Conference 2013GTC 2013, March 18-21 in San Jose, California, is a must attend event for computational researchers and application developers pursuing the latest in scientific discovery and innovation in life sciences, oil & gas, defense, finance, and more.

You’ll have your choice of over 300 talks across a wide variety of science and research topics. In addition, and at no additional charge as part of your Full Conference pass, you’ll receive first-hand instruction from NVIDIA’s own engineering and research staff during a full day of pre-conference tutorials. Learn more about the full line-up of tutorials, talks and topics.

Register today and save $150 before the discount deadline on February 18. As an added bonus to CUDA Registered Developers, use code GM10CRD for an additional 10% off the published price.

LAST CHANCE TO SHARE YOUR RESEARCH
The Research Poster Showcase is a crowd favorite at GTC and is one of the most popular networking events. Call for Posters closes shortly. If you are doing interesting GPU-enabled work in academia or industry, we encourage you to submit a proposal. For detailed submission instructions, as well as the many benefits of presenting, please visit the Call for Posters page and submit before February 4.

See you all at GTC 2013.

Best regards,
Nadeem Mohammad, CUDA Developer Relations

NVIDIA’s GPU Technology Conference (GTC) 2013

NVIDIA’s GPU Technology Conference (GTC) 2013 is just around the corner. Scheduled for March 18-21 in San Jose, California, the event offers cutting edge development sessions in a friendly, fun and collaborative environment.

A sample of cutting edge development sessions includes:

   • OpenGL 4 and Beyond for Game Developers
   • Porting Source to Linux: Valve’s Lessons Learned
   • Bringing PC and Console Games to Mobile
   • Post Mortem: GPU Accelerated Effects in Borderlands 2

Check out the entire line-up of game development sessions by clicking here.

So, register today to attend and let us help you improve your skills! And as an added bonus, use code GM10ND for an additional 10% off the published price.

If you haven’t been to GTC before, you won’t be disappointed. Beyond the game development track, the conference will also feature 300-plus deep-dive sessions across a wide-array of topics, 100-plus research posters, and valuable networking with other developers and researchers from over 40 countries.

Your next breakthrough could be one conversation away. Secure your spot today!

Best Regards,
David Weller, Developer Relations Manager

P.S. If you need to convince your boss that attending GTC is both cost effective and strategically important to your organization, then we have you covered. Download our Convince Your Manager Toolkit; we made it easy for you to make the case to your manager that the best use of your organization’s training budget is your attendance at GTC.

AMD Gaming Evolved Newsletter

DmC Devil May Cry – Available Now!
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  Read More

Raven’s Cry
Raven’s Cry immerses players in the dark world of 17th Century Caribbean piracy. With raw, unrelenting ferocity the developers at Octane Games have created a story that will forever change the image of pirates in popular culture. This cutthroat chapter of history is re-imagined with such bloodthirsty authenticity that it will make familiar Hollywood images of friendly drunken pirates singing tunes on flawless white-sand beaches a distant memory.

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Get gaming with the XFX Radeon HD 7970 3GB DDR5 Video Card at Tiger Direct.
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Get your game on with the iBUYPOWER
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  Learn More

Special Issue on Unconventional Cluster Architectures and Applications,

 CALL FOR PAPERS

                        Springer Cluster Computing
        The Journal of Networks, Software Tools and Applications
                       Editor-in-Chief: Salim Hariri
Special Issue on Unconventional Cluster Architectures and Applications
               Guest Editors: Federico Silla, Holger Fr?ning
                http://www.hucaa-workshop.org/clustersi2013
                   Paper submission: February 17th, 2013
==============================

========================================

This CLUSTER COMPUTING JOURNAL special issue gears to gather recent
work on unconventional cluster architectures and applications, which
potentially have a big impact on defining future cluster architectures.
This includes any cluster architecture that is not based on the usual
commodity components and therefore makes use of some special hard- or
software elements, or that is used for very special and unconventional
applications. Examples include GPUs, MICs (Many Integrated Core), FLASH
and FPGAs on the hardware side, and run-time management,
virtualization, in-memory storage and device-to-device communication on
the software side. We are in particular encouraging work on disruptive
approaches, which may show inferior performance today but can already
point out their full performance potential. The broad scope of the
special issue facilitates submissions on unconventional uses of
hardware or software, gearing to gather ideas that are coming to life
now and not limiting them except for their context: clusters.

We are seeking new proposals presented from a holistic perspective. In
this regard, one of the aims of the special issue is anticipating the
evolution of clusters, instead of just presenting new work carried out
in the traditional cluster areas usually addressed in other journals
and conferences.


TOPICS OF INTEREST
Topics of interest include any unconventional cluster architecture or
application. Examples include, but are not limited to:
- High-performance, data-intensive, and power-aware computing
- Application-specific clusters, datacenters, and high performance
       cloud architectures
- Software cluster-level virtualization for consolidation purposes
- Principles from organic computing applied to cluster architectures
- Hardware techniques for disaggregation of resources
- Management techniques for large-scale systems
- New uses of GPUs, FPGAs, and other specialized hardware
- Dedicated support for novel parallel programming paradigms like PGAS
       or MapReduce
- New industry and technology trends and their potential impact on one
       of the above


IMPORTANT DATES
- Paper submission: February 17th, 2013
- Notification of acceptance: May 1st, 2013
- Final Manuscript Due: June 3rd, 2013
- Publication of Special Issue: 4th Quarter 2013


GUEST EDITORS
- Federico Silla, Technical University of Valencia, Spain,
       fsilla@disca.upv.es
- Holger Fr?ning, University of Heidelberg, Germany,
       froening@uni-hd.de


SUBMISSION
For further information about formatting instructions and submissions,
please check the journal web site: http://www.springer.com/journal/10586
The maximum number of pages in IEEE double column format is 10 pages,
the length of the final article should not exceed 10 pages. Please note
that authors are required to submit their work in Latex, Word, TXT or
similar, but not PDF. The final formatting is being done by Springer.


REVIEW BOARD
- Mark Hummel, AMD, US
- Jeff Young, Georgia Tech, US
- Ben Juurlink, Technische U. Berlin, Germany
- Rafael Mayo Gual, U. Jaume I, Spain
- Juan Manuel Ordu?a, U. Valencia, Spain
- Pedro Javier Garc?a, U. Castilla-La Mancha, Spain
- Frank Olaf Sem-jacobsen, Simula Labs, Norway
- Elvira Baydal, U. Polit?cnica Valencia, Spain
- David Black-Schaffer, U. Uppsala, Sweden
- Gaspar Mora Porta, Intel, US
- Ron Sass, U. NC-Charlotte, US
- Christian Terboven, RWTH Aachen, Germany
- Stephan Diestelhorst, Technical University of Dresden, Germany
- Yong Ho Song, Hanyang University, South Korea
- Andrew Kerr, NVidia, US
- Heiner Litz, Stanford, US


Additional information about the special issue can be found here:
http://www.hucaa-workshop.org/clustersi2013

The 3rd IEEE International Workshop on Data Center Performance (DCPerf'13)

             Call for Papers -Extended Submission Due Date: February 4,
2013


The 3rd IEEE International Workshop on Data Center Performance (DCPerf'13)
                           Philadelphia, USA, July 8-11, 2013
                      http://www.zurich.ibm.com/dcperf13

                              in conjunction with

   The 33nd International IEEE Conference on Distributed Computing Systems
(ICDCS'13)
                         http://www.temple.edu/cis/icdcs2013/



Data centers have become an integral part of the backbone infrastructure
for
information technology. In particular, they provide a cost efficient
solution
for provisioning a wide range of computing resources in diverse
environments
such as business, scientific, and mobile. Due to the rapid growth of
user-defined
and user-generated programs, applications and content, the complexity of d
eploying and operating data centers continues to increase. Considering the
high
volume of mixed workloads, the diversity of services offered, and the
increasing
mobility of users across geographically distributed areas, the performance
optimization of data centers has become ever more necessary and
challenging,
especially in view of criteria such as scalability, reliability,
manageability,
power efficiency, area density, and operating costs. As a result, adaptive
and
autonomic optimization strategies are essential in managing the
multi-dimensional
complexity of data center performance.
The goal of this workshop is to promote a community-wide discussion to find
and
identify suitable strategies to enable effective and scalable data center
performance
optimizations. We are looking for papers that present new techniques,
introduce new
methodologies, propose new research directions, or discuss strategies for
resolving
open performance problems of data centers.

Topics of interest include (but are not limited to)
- System Performance
  Hardware & Software Architecture
  Resource management & middleware
  Evaluation/modeling methodologies
  Empirical studies
- Communications Performance
  Intra/Inter DC communication
  Open-flow based networks
  DC Network architecture & protocols
- Storage and I/O Performance
  Storage architecture
  I/O scalability and performance
- DC power and thermal issues
  Power and Thermal modeling
  Power constrained performance
- Security and Robustness
  Performance of Security solutions
  Intrusion & misconfiguration monitoring
  Variability and Reliability modeling
- Virtualization and Cloud Computing
  Hypervisors & HW virtualization support
  Virtualized networking and storage
  Outsourcing issues
  Cloud scalability and management
- Performance of  DC Applications
  Cloud computing
  Content distribution
  Hadoop applications
  Real-time analytics

Important dates
Paper Registration and Submission(Extended):      February 4, 2013
Notification of Acceptance:                                     March 04, 2013
Final Manuscript Due:                                          March 25, 2013

Submission Guideline
Manuscripts must be limited to 6 pages plus up to 1 over-length pages in
IEEE 8.5x11 format. Accepted papers will be published in the combined ICDCS
2013
Workshop proceedings and will be available through IEEE Xplore. Manuscripts
should
be submitted via https://www.easychair.org/account/signin.cgi?conf=dcperf13

Organizing CommitteeGeneral Chair
Neeli R. Prasad, Aalborg University, Denmark

TPC Chair
Krishna Kant, George Mason University, VA, USA
Lydia Y. Chen, IBM Zurich Research Lab, Switzerland

Steering Committee
Jiannong Cao, Hong Kong Polytechnic University, Hong Kong; Alok Choudhary,
Northwerstern University, USA;
Peter Muller, IBM Research Zurich Lab, Switzerland; Martin Schmatz, IBM
Research Zurich Lab, Switzerland;
Anand Sivasubramaniam, Penn State University, USA; Larry Xue, Arizona State
University, USA

3rd International Workshop on Fault-Tolerance for HPC at Extreme Scale (FTXS 2013)

CALL FOR PAPERS
3rd International Workshop on
Fault-Tolerance for HPC at Extreme Scale (FTXS 2013)

In conjunction with
The 22nd International ACM Symposium on
High Performance Parallel and Distributed Computing (HPDC 2013)
New York City, New York, USA on June 17-21, 2013

WORKSHOP MOTIVATION
For the HPC community, a new scaling in numbers of processing elements
has superseded the historical trend of Moore's Law scaling in
processor frequencies. This progression from single core to multi-core
and many-core will be further complicated by the community's imminent
migration from traditional homogeneous architectures to ones that are
heterogeneous in nature. As a consequence of these trends, the HPC
community is facing rapid increases in the number, variety, and
complexity of components, and must thus overcome increases in
aggregate fault rates, fault diversity, and complexity of isolating
root cause.

Recent analyses demonstrate that HPC systems experience simultaneous
(often correlated) failures. In addition, statistical analyses suggest
that silent soft errors can not be ignored anymore, because the
increase of components, memory size and data paths (including
networks) make the probability of silent data corruption (SDC)
non-negligible. The HPC community has serious concerns regarding this
issue and application users are less confident that they can rely on a
correct answer to their computations. Other studies have indicated a
growing divergence between failure rates experienced by applications
and rates seen by the system hardware and software. At Exascale, some
scenarios project failure rates reaching one failure per hour. This
conflicts with the current checkpointing approach to fault tolerance
that requires up to 30 minutes to restart a parallel execution on the
largest systems.  Lastly, stabilization periods for the largest
systems are already significant, and the possibility that these could
increase in length is of great concern.  During the Approaching
Exascale report at SC11, DOE program managers identified resilience
as a black swan - the most difficult under-addressed issue facing HPC.

OPEN QUESTIONS
What does the fault-tolerance community need to do in order to be
prepared to face the challenges of extreme scale computing? What is
needed to keep applications with billions of threads of parallelism up
and running on systems that fail tens of times per day? As models
predict less than 50% efficiency of traditional checkpoint/restart
methods on future systems, are we ready to pay the cost of full
redundancy, effectively performing redundant multi-threading (RMT)
across entire systems? Do we even have the infrastructure necessary to
implement an RMT strategy?

How is the supercomputing community going to efficiently isolate
failures on enormously complex systems? Is there any chance to
understand these systems in such a way that some failure could be
predicted with enough accuracy and anticipation to trigger useful
failure avoidance actions? What can the community do to protect
applications from SDC in memory and logic? How far the user and the
programmer should be involved in managing faults? What are the most
promising self-healing numerical methods?

GOALS
The goals of this workshop are to consider these complex questions, to
discuss the unique limitations that extreme scale and complexity
impose on traditional methods of fault-tolerance, and to explore new
strategies for dealing with those challenges.

PAPER SUBMISSIONS
Submissions are solicited in the following categories:
* Regular papers presenting innovative ideas improving the state of the art.
* Experience papers discussing the issues seen on existing extreme-scale
 systems, including some form of analysis and evaluation.
* Extended abstracts proposing disruptive ideas in the field,
 including some form of preliminary results

Submissions shall be sent electronically, must conform to IEEE
conference proceedings style and should not exceed eight pages including
all text, appendices, and figures.

TOPICS
Assuming hardware and software errors will be inescapable at extreme
scale, this workshop will consider aspects of fault tolerance peculiar
to extreme scale that include, but are not limited to:
* Quantitative assessments of cost in terms of power, performance, and
 resource impacts of fault-tolerant techniques, such as checkpoint
 restart, that are redundant in space, time or information
* Novel fault-tolerance techniques and implementations of emerging
 hardware and software technologies that guard against silent data
 corruption (SDC) in memory, logic, and storage and provide
 end-to-end data integrity for running applications; Studies of
 hardware / software tradeoffs in error detection, failure
 prediction, error preemption, and recovery
* Advances in monitoring, analysis, and control of highly complex systems
* Highly scalable fault-tolerant programming models
* Metrics and standards for measuring, improving and enforcing the
 need for and effectiveness of fault-tolerance
* Failure modeling and scalable methods of reliability, availability,
 performability and failure prediction for fault-tolerant HPC
 systems
* Scalable Byzantine fault tolerance and security from single-fault
 and fail-silent violations
* Benchmarks and experimental environments, including fault-injection
 and accelerated lifetime testing, for evaluating performance of
 resilience techniques under stress

IMPORTANT DATES
Submission of papers: February 11th, 2013
Author notification: March 18th, 2013
Camera ready papers: April 15th, 2013
Workshop: June 17th or June 18th, 2013

WORKSHOP ORGANIZERS
Nathan DeBardeleben - Los Alamos National Laboratory
Jon Stearley - Sandia National Laboratories
Franck Cappello - INRIA & University of Illinois at Urbana Champaign

PROGRAM COMMITTEE
Rob Aulwes - Los Alamos National Laboratory
Greg Bronevetsky - Lawrence Livermore National Laboratory
Clayton Chandler - Department of Defense
Robert Clay - Sandia National Laboratories
John Daly - Department of Defense
Christian Engelmann - Oak Ridge National Laboratory
Felix Salfner - SAP Innovation Center Potsdam
Kurt Ferreira - Sandia National Laboratories
Ana Gainaru - University of Illinois at Urbana-Champaign
Leonardo Bautista Gomez - Tokyo Institute of Technology
Hideyuki Jitsumoto - The University of Tokyo
Rakesh Kumar - University of Illinois, Urbana-Champaign
Zhiling Lan - Illinois Institute of Technology
Naoya Maruyama - Tokyo Institute of Technology
Kathryn Mohror - Lawrence Livermore National Laboratory
Rolf Riesen - IBM Research - Ireland
Yve Robert - ENS Lyon

See http://institute.lanl.gov/resilience/workshops/ftxs2013/ for
more information.

FastPath 2013: Second International Workshop on Performance Analysis of Workload Optimized Systems April 21st, 2013, Austin, TX (In Conjunction with ISPASS-2013)

http://www.ispass.org/ispass2013/fastpath2013



The goal of FastPath is to bring together researchers and practitioners involved in cross-stack hardware/software performance analysis, modeling, and evaluation of workload optimized systems. With microprocessor clock speeds being held constant, optimizing systems around specific workloads is an increasingly attractive means to improve performance. The importance of workload optimized systems is seen in their ubiquitous deployment in diverse systems from cellphones to tablets to routers to game machines to

Top500 supercomputers, and IT appliances such as IBM's DataPower and Netezza, and Oracle's Exadata. More precisely, workload optimized systems have hardware and/or software specifically designed to run well for a particular application or application class. The types and components of workload optimized systems vary, but a partial list includes traditional CPUs assisted with accelerators (ASICs, FPGAs, GPUs), memory accelerators, I/O accelerators, hybrid systems, and IT appliances. Exploiting CPU savings and speed-ups offered by workload optimized systems for application level performance improvement poses several cross stack hardware and software challenges.  These include developing alternate programming models to exploit massive parallelism offered by accelerators, designing low-latency, high-throughput H/W-S/W interfaces, and developing techniques to efficiently map processing logic on hardware.



Topics

FastPath seeks to facilitate the exchange of ideas on performance analysis and evaluation of workload optimized systems and seeks papers on a wide range of topics including, but not limited to:



Workloads

Simulators

Industrial Experiences

GPUs, FPGAs, ASIC Accelerators

Game Consoles and their Sensors

RDMA and Infiniband

Measurements on accelerated systems

Analytical Techniques

Programming Models

MapReduce, Hadoop

Runtime Management Systems



Key Dates

Submission:                 March 10, 2013

Notification:               April 1, 2013

Final Materials Due:        April 11, 2013



Organizers

General Chair:              Erik Altman (IBM)

Program Committee Chairs:   Parijat Dube (IBM), Lizy K John(University of Texas at Austin)

Web Chair:                  Augusto Vega (IBM)

Publicity Chair:            Mark Hempstead (Drexel University)

HLPP2013 Paris July2013: Third Call for Papers

*HLPP2013 Paris July2013: Third Call for Papers
International Symposium on High-level Parallel Programming and
Applications,  https://sites.google.com/site/hlpp2013/

All accepted papers will be published in a special issue of the Springer
International Journal of Parallel Programming.
Symposium held in central Paris Mon-Tue 1-2 July 2013.
Invited speaker: L. Valiant, 2010 Turing award, inventor of the BSP
paradigm.

Contacts: gaetan.hains@u-pec.fr,   Youry.Khmelevsky@ubc.ca*

11th International Symposium on Code Generation and Optimization (CGO)

The 11th International Symposium on Code Generation and Optimization (CGO)
will be held on Feb. 23-27, 2013 at Shenzhen, China. I am glad to invite
you to attend this important conference in compiler and architecture area.**
**

 ****

Since the early registration due time is coming, only 1 week left from now.
If you plan to attend the conference, please remember to register the
conference before the following date so as to avoid the unnecessary cost.***
*

 ****

EARLY REGISTRATION DEADLINE: Jan. 26th, 2013, 11:59 PM EST.****

 ****

 ****

The program committee has put together a strong technical program with
a record number of accepted papers (33 regular papers). We have
also scheduled 5 tutorials and 3 workshops. CGO 2013 co-locates with other
2 important conferences, HPCA and PPoPP. 3 conferences will share 2
excellent keynotes, reception, banquet, and excursion. You can attend 3
conferences after you register one of them.****

 ****

To reduce the burden of student traveling, we set aside the dedicated
funding to support them. Students can apply the grant according to the
instruction of CGO 2013 website. We are negotiating with another economy
hotel and will sign contract soon. The price of 1 double-bed room/night is
around $50. After signing the contract, we will open the booking link
immediately.****

** **

We look forward to your participation in this important event. For more
information, please visit the conference website:****

http://www.cgo.org/cgo2013/  ****

 ****

Chenggang Wu****

General co-Chair of CGO 2013****

The submission deadline for the 1st International Workshop on OpenCL (IWOCL 2013) has been extended by two weeks to February 8th

  Please see http://iwocl.org<http://iwocl.org/> for more information and to submit your work.

The workshop will be held at the Technology Square Research Building (TSRB) at the Georgia Institute of Technology in Atlanta, Georgia.  The workshop takes place May 13th ? 14th, 2013.

Best Regards,
Ben Bergen

--
Los Alamos National Laboratory
P.O. Box 1663, MS B287
Los Alamos, NM 87545

505-946-8227 (m)
505-667-1699 (w)
505-665-4939 (f)

PPoPP 2013 CALL FOR PARTICIPATION

PPoPP is a forum for leading work on all aspects of parallel programming,
including foundational
and theoretical aspects, techniques, languages,
compilers, runtime systems, tools, and practical
experiences. In the context of the symposium, "parallel programming" encompasses work on
concurrent and parallel systems (multicore, multithreaded, heterogeneous, clustered systems,
distributed systems, grids, clouds, and large scale machines).

CALL FOR PARTICIPATION


PPoPP 2013 will feature 26 full papers and 19 poster papers. The technical program is now posted
at http://ppopp2013.ics.uci.edu/program.html.

PPoPP 2013will also co-host several workshops and tutorials details of which are given
at http://www.ics.uci.edu/~guoqingx/ppopp13/workshop-schedule.html

???
Early Registration??? ????????????????? January 26th 2013, 11:59pm EST???
Workshops and Tutorials??????? ??? 23-24 Feb, 2013


Keynote speakers will be announced shortly.



General Chairs

------------------

* Alex Nicolau, UC Irvine

* Xiaowei Shen, IBM China



Program Chairs

-------------------

* Saman Amarasinghe, MIT

* Richard Vuduc, Georgia Tech

Workshops and Tutorials Co-Chairs:
------------------------------

-------------???
*?Harry Xu, University of California, Irvine

ASPLOS 2013 Provocative Ideas Session

ASPLOS 2013 Provocative Ideas Session
 * http://asplos13.rice.edu/provocative-ideas/
 * Submission deadline: January 31st, 11:59pm EST
 * 2 pages, single-spaced, 10pt font, PDF submissions
 * mail submissions to asplos.pi.2013@gmail.com


ASPLOS 2013 Conference Program
 * http://asplos13.rice.edu/programme/
 * 44 papers to be presented

Springer Cluster Computing, CLUSTER COMPUTING JOURNAL CALL FOR PAPERS

CALL FOR PAPERS

                        Springer Cluster Computing
        The Journal of Networks, Software Tools and Applications
                      Editor-in-Chief: Salim Hariri
Special Issue on Unconventional Cluster Architectures and Applications
              Guest Editors: Federico Silla, Holger Fr?ning
http://www.hucaa-workshop.org/clustersi2013
                   Paper submission: 31st January 2013
======================================================================

This CLUSTER COMPUTING JOURNAL special issue gears to gather recent
work on unconventional cluster architectures and applications, which
potentially have a big impact on defining future cluster architectures.
This includes any cluster architecture that is not based on the usual
commodity components and therefore makes use of some special hard- or
software elements, or that is used for very special and unconventional
applications. Examples include GPUs, MICs (Many Integrated Core), FLASH
and FPGAs on the hardware side, and run-time management,
virtualization, in-memory storage and device-to-device communication on
the software side. We are in particular encouraging work on disruptive
approaches, which may show inferior performance today but can already
point out their full performance potential. The broad scope of the
special issue facilitates submissions on unconventional uses of
hardware or software, gearing to gather ideas that are coming to life
now and not limiting them except for their context: clusters.

We are seeking new proposals presented from a holistic perspective. In
this regard, one of the aims of the special issue is anticipating the
evolution of clusters, instead of just presenting new work carried out
in the traditional cluster areas usually addressed in other journals
and conferences.


TOPICS OF INTEREST
Topics of interest include any unconventional cluster architecture or
application. Examples include, but are not limited to:
- High-performance, data-intensive, and power-aware computing
- Application-specific clusters, datacenters, and high performance
    cloud architectures
- Software cluster-level virtualization for consolidation purposes
- Principles from organic computing applied to cluster architectures
- Hardware techniques for disaggregation of resources
- Management techniques for large-scale systems
- New uses of GPUs, FPGAs, and other specialized hardware
- Dedicated support for novel parallel programming paradigms like PGAS
    or MapReduce
- New industry and technology trends and their potential impact on one
    of the above


IMPORTANT DATES
- Paper submission: 31st January 2013
- Notification of acceptance: 15th April 2013
- Final Manuscript Due: 31st May 2013
- Publication of Special Issue: 4th Quarter 2013


GUEST EDITORS
- Federico Silla, Technical University of Valencia, Spain,
fsilla@disca.upv.es
- Holger Fr?ning, University of Heidelberg, Germany,
froening@uni-hd.de


SUBMISSION
For further information about formatting instructions and submissions,
please check the journal web site: http://www.springer.com/journal/10586
The maximum number of pages in IEEE double column format is 10 pages,
the length of the final article should not exceed 10 pages. Please note
that authors are required to submit their work in Latex, Word, TXT or
similar, but not PDF. The final formatting is being done by Springer.


REVIEW BOARD
- Mark Hummel, NVidia, US
- Jeff Young, Georgia Tech, US
- Ben Juurlink, Technische U. Berlin, Germany
- Rafael Mayo Gual, U. Jaume I, Spain
- Juan Manuel Ordu?a, U. Valencia, Spain
- Pedro Javier Garc?a, U. Castilla-La Mancha, Spain
- Frank Olaf Sem-jacobsen, Simula Labs, Norway
- Elvira Baydal, U. Polit?cnica Valencia, Spain
- David Black-Schaffer, U. Uppsala, Sweden
- Gaspar Mora Porta, Intel, US
- Ron Sass, U. NC-Charlotte, US
- Christian Terboven, RWTH Aachen, Germany
- Stephan Diestelhorst, Technical University of Dresden, Germany
- Yong Ho Song, Hanyang University, South Korea
- Andrew Kerr, NVidia, US
- Heiner Litz, Stanford, US


Additional information about the special issue can be found here:
http://www.hucaa-workshop.org/clustersi2013

Euro-Par 2013, 19th International European Conference on Parallel and Distributed Computing

19th International European Conference on
Parallel and Distributed Computing

Euro-Par 2013
Aachen, Germany
August 26-30, 2013
http://www.europar2013.org

**** SUBMISSION DEADLINE ****

Workshop proposal due: February 28, 2013, 23:59 AOE

**** SCOPE OF THE CONFERENCE ****

Euro-Par is an annual series of international conferences dedicated to the promotion and advancement of all aspects of parallel and distributed computing.  It covers a wide spectrum of topics from algorithms and theory to software technology and hardware-related issues, with application areas ranging from scientific to mobile and cloud computing. The objective of Euro-Par is to provide a forum for the introduction, presentation and discussion of the latest scientific and technical advances, extending the frontier of both the state of the art and the state of the practice.  A full list of topics covered by regular Euro-Par 2013 sessions can be found here:

http://www.europar2013.org/conference/topics/

To provide further meeting points for researchers to discuss and exchange ideas on topics related to parallel and distributed computing, Euro-Par 2013 will continue the tradition of co-locating workshops with the main conference and invites proposals for the workshop program. The workshops will be held on August 26-27, two days before the main conference.

Workshop proceedings will be published in a separate LNCS Euro-Par 2013 volume after the conference.  The principal coordinator of each workshop will appear as an editor of the workshop volume.  Registered workshop participants will receive an electronic copy of the volume by mail. All authors of accepted papers will be requested to sign a Springer copyright form.

**** WORKSHOP PROPOSAL GUIDELINES ****

The proposals should include the following information:
*     Workshop title
*     Information on the organizers, including a short biography of each organizer
*     The tentative program committee
*     Description of the workshop including its objectives, its contents and its format, indicating a preference for the length of the workshop (half a day or a full day)
*     Potential attendees
*     Potential authors
*     Workshop background (previous editions)
*     Link to international projects/initiatives

Please direct questions to workshops@europar2013.org<

mailto:workshops@europar2013.org> .

The decision on acceptance/rejection of workshop proposals will be made on the basis of the overall quality of the proposal and the degree to which it matches the scope of the conference. In the case of workshop proposals with common or very similar objectives and contents, a proposal on how to merge the overlapping workshops will be made.

**** RESPONSIBILITY OF THE WORKSHOP ORGANIZERS ****

*     Preparing the call for papers for the workshop and publicizing it
*     Maintaining the workshop Web site
*     Selecting the workshop program committee
*     Selecting the papers through a rigorous peer-review process
*     Delivering the final workshop program to the Euro-Par 2013 conference co-chairs in time
*     Delivering preliminary workshop proceedings in time before the conference
*     Reporting to the Euro-Par Steering Committee after the conference about keys indicators: number of submitted and accepted papers, program committee and review process management, etc.
*     Delivering the final workshop proceedings with a revised version of the papers in time after the conference in the required Springer LNCS format (10 pages max.) and writing an introductory preface to the workshop. Camera-ready papers will be published only if the management report has been delivered.

**** WORKSHOP SUBMISSION GUIDELINES ****

Workshop proposals are due by February 28, 2013. The proposals should be sent via email to workshops@europar2013.org<mailto:workshops@europar2013.org> .

**** IMPORTANT DATES ****

Workshop proposal due: Thursday, February 28, 2013, 23:59 AOE
Workshop notifications: Friday, March 22, 2013
Workshop website online: Monday, April 22, 2013
Workshop dates: August 26-27, 2013
Workshop management report due:  Friday, October 3, 2013

There will be common due dates for all workshop authors:

Workshop papers due: Friday, May 31, 2013
Workshop author notification: Monday, July 8, 2013
Workshop camera-ready papers due: Friday, October 3, 2013

**** LOCATION ****

The Euro-Par 2013 conference will take place in Aachen, Germany, from August 26th until August 30th, 2013. The conference is jointly organized by the German Research School for Simulation Sciences, Forschungszentrum Juelich, and RWTH Aachen University in the framework of the Juelich Aachen Research Alliance.

**** WORKSHOP CO-CHAIRS ****

Dieter an Mey, RWTH Aachen University
Luc Bouge, ENS de Cachan

**** CONTACT ****

Please direct questions to workshops@europar2013.org<mailto:workshops@europar2013.org> .

CUDA: WEEK IN REVIEW, a news summary for the worldwide CUDA, GPGPU and parallel programming community.

Welcome to CUDA: WEEK IN REVIEW, a news summary for the worldwide CUDA, GPGPU and parallel programming community.

Top 10 Recommendations! To usher in 2013, the NVIDIA team compiled a list of recommended activities for GPU computing fans: 1. Sign up today for GTC 2013 in San Jose, Calif. 2. Enroll in free Udacity Parallel Programming course 3. Download CUDA 5 4. Register as a CUDA Developer 5. Tell us how you are using CUDA 6. Test drive the new Kepler GPU accelerator 7. Join or start a GPU Meetup in your city 8. Nominate a colleague as a CUDA Spotlight 9. Watch presentation on CUDA by Stephen Jones 10. Learn about OpenACC And, please take a minute to fill out our reader survey so we can improve the newsletter in 2013. Thanks!

CUDA SPOTLIGHT
GPU-Accelerated Life Sciences This week’s Spotlight is on Bob Zigon of Beckman Coulter. Bob’s focus is on GPU acceleration of Beckman Coulter’s life sciences products. Bob was a GTC presenter in 2010 and 2012. The topic of his upcoming GTC 2013 talk is Computing Protein Size Distributions Using Centrifugation Techniques and the Tesla K20 GPU. Read our interview with Bob Zigon.
CUDA EDUCATION
Parallel Programming Course to Launch in February Udacity’s Intro to Parallel Programming course begins in just a few weeks. This brand-new online class consists of seven units (lectures/homework/quizzes) which you can take at your own pace. You’ll learn about parallel programming by coding a series of image processing algorithms, such as you might find in Photoshop or Instagram. People who successfully complete the course will earn a Udacity certificate, a badge of accomplishment that can be posted on LinkedIn, job websites and resumes. Intro to Parallel Programming is open to students and professionals around the world at no charge. In addition, we are pleased to announce that Amazon Web Services will provide on-demand access to GPU compute instances on Amazon EC2 to qualifying students. While EC2 is not required to complete the course, it’s a helpful option for students who want to experiment with parallel and distributed computing on CUDA GPUs. The course is taught by Dr. David Luebke of NVIDIA and Dr. John Owens of UC Davis. Guest lecturers include Ian Buck, Bill Dally and Stephen Jones of NVIDIA.    • Watch the video about Intro to Parallel Programming    • Sign up for Intro to Parallel Programming    • Learn more about Udacity Learn more about Amazon EC2
CUDA NEWS
Try Tesla K20 Speed up your application with NVIDIA Tesla K20 GPU Accelerators. Built on the Kepler compute architecture, Tesla K20 offers innovative technologies like Dynamic Parallelism and Hyper-Q to boost performance and power efficiency. Special offer: Purchase a Tesla K20 GPU Accelerator by Jan. 27 and receive a free GTC 2013 pass (US only). GPU test drive: Take a free and easy test drive to see how Tesla K20 can accelerate your code.
CUDA JOB OF THE WEEK	back to the top
GIS Federal seeks a Geospatial/GPU Software Engineer to develop high performance computation engine for geospatial intelligence. You will with with latest technologies including GPU supercomputing, Google Earth and 3D gaming engines. Requires TS/SCI security clearance. Learn more here.
FROM THE BLOGOSPHERE	back to the top
New on the Parallel Forall Blog: Join Me at GTC 2013, by Mark Harris Using Shared Memory in CUDA Fortran, by Greg Ruetsch CUDA Pro Tip: Flush Denormals with Confidence, by Mark Harris How to Access Global Memory Efficiently in CUDA C/C++ Kernels, by Mark Harris How to Access Global Memory Efficiently in CUDA Fortran Kernels, by Greg Ruetsch (Subscribe to the Parallel Forall RSS feed)
GPU MEETUPS	back to the top
Find a GPU Meetup in your location, or start one up. Upcoming meetings include: Brisbane, Jan. 24 New York, Jan. 24 Silicon Valley, Jan. 28 Minnesota, Jan. 29 Paris, Feb. 18
CUDA CALENDAR	back to the top
4-Day CUDA Course (Acceleware)   Jan. 29-Feb. 1, 2013, Chicago, Illinois Instructor: Dr. Kelly Goss Titan Users and Developers Workshop (West Coast)   Jan. 29-31, 2013, Santa Clara, Calif. Hands-on training on Titan, the world’s fastest supercomputer Signal Processing & Communications Algorithms Using GPU Computing (Webinar)   Jan. 31, 2013 Instructor: Kirthi Devleker, MathWorks HPC Advisory Council Stanford Conference   Feb. 7-8, 2013, Stanford, Calif. Open to the public Note: NVIDIA's Sarah Tariq to present on scaling applications on large GPU clusters Intro to CUDA + OpenACC Course   Feb. 12-14, 2013, Ukraine, Lviv Sponsored by Applied Parallel Computing LLC Contact: akomissarov[at]nvidia[dot]com Winter GPU Computing School (Moscow State University)   Feb. 20-22, 2013, Moscow, Russia Intro to CUDA + OpenACC Course   March 4-5, 2013, Hamburg, Germany Sponsored by Applied Parallel Computing LLC Contact: akomissarov[at]nvidia[dot]com 4-Day CUDA Course - Oil & Gas (Acceleware)   March 12-15, 2013, Houston, Texas Instructor: Dr. Kelly Goss HPC Advisory Council   March 13-15, 2013, Lugano, Switzerland GPU Tech Conference (GTC 2013)   March 18-21, 2013, San Jose, Calif. Special code for CUDA newsletter readers: GM10CD 4-Day CUDA Course (Acceleware)   May 7-10, 2013, San Francisco, Calif. Instructor: Dr. Kelly Goss (To list an event, email: cuda_week_in_review@nvidia.com)
CUDA RESOURCES	back to the top
GPU-Accelerated Apps List of 200+ popular GPU-accelerated scientific and research applications. CUDA Documentation The new CUDA documentation site includes release notes, programming guides, manuals and code samples. CUDA Education Udacity Course Coursera Course NVIDIA Developer Forums Join us on the NVIDIA DevTalk forums to share your experience and learn from other developers. You can also ask questions on Stack Overflow, using the ‘cuda’ tag. CUDA Consulting Training, programming, and project development services are available from CUDA consultants around the world. To be considered for inclusion on list, email: cuda_week_in_review@nvidia.com (with CUDA Consulting in subject line). GPU Computing on Twitter For daily updates about GPU computing and parallel programming, follow @gpucomputing on Twitter. Downloads CUDA 5 CUDA 5 survey Nsight CUDA on the Web CUDA Spotlights CUDA Newsletters CUDA Zone GPU Test Drive GPUComputing.net GPGPU.org