CALL FOR PAPERS
Eight Workshop on Programmability Issues for Heterogeneous Multicores
(MULTIPROG-2015)
Held in conjunction with the 10th International Conference on High-Performance
and Embedded Architectures and Compilers (HiPEAC)
Amsterdam, The Netherlands, January 20, 2015
Workshop website: http://research.ac.upc.edu/
Goal of the Workshop
--------------------
Computer manufacturers have embarked on the many-core roadmap, promising to
add more and more cores/hardware threads on their chips. The ever-increasing
number of cores and heterogeneity in architectures has placed new burdens on
the programming community. Software needs to be parallelized and optimized for
accelerators such as GPUs in order to take advantage of the new breed of
multi-/many-core computers. As a result, progress in how to easily harness the
computing power of multi-core architectures is in great demand.
The eighth edition of the MULTIPROG workshop aims to bring together
researchers interested in programming models, runtimes, and computer
architecture. The workshop's emphasis is on heterogeneous architectures and
covers issues such as:
* How can future parallel programming models improve software productivity?
* How should compilers, runtimes and architectures support programming
models and emerging applications?
* How to design efficient data structures and innovative algorithms?
MULTIPROG is intended for quick publication of early results, work-in-progress,
etc., and is not intended to prevent later publication of extended papers.
Informal proceedings with accepted papers will be made available at
the workshop.
Topics of interest
------------------
Papers are sought on topics including, but not limited to:
* Multi-core architectures
o Architectural support for compilers/programming models
o Processor (core) architecture and accelerators
o Memory system architecture
o Performance, power, temperature, and reliability issues
* Heterogeneous computing
o Algorithms and data structures for heterogeneous systems
o Applications for heterogeneous computing and real-time graphics
* Programming models for multi-core architectures
o Language extensions
o Run-time systems
o Compiler optimizations and techniques
* Benchmarking of multi-/many-core architectures
o Tools for discovering and understanding parallelism
o Tools for understanding performance and debugging
o Case studies and performance evaluation
Important dates
---------------
Final submission: October 24, 2014
Author notification: November 28, 2014
Paper submission
----------------
Submissions should not exceed 12 pages and should be formatted according to the
LNCS format for CS Proceedings. This limit includes text, figures, tables and
references.
Please use one of the templates below:
* Latex template:
ftp://ftp.springer.de/pub/tex/
* Word template:
ftp://ftp.springer.de/pub/tex/
Submission link: https://easychair.org/
Organizers
----------
Miquel Pericàs, Chalmers University of Technology, Sweden,
miquelp[at]chalmers.se
Vassilis Papaefstathiou, Chalmers University of Technology, Sweden,
vaspap[at]chalmers.se
Oscar Palomar, Barcelona Supercomputing Center, Spain, oscar.palomar[at]bsc.es
Ferad Zyulkyarov, Barcelona Supercomputing Center, Spain,
ferad.zyulkyarov[at]bsc.es)
Steering committee
------------------
Eduard Ayguade, UPC/Barcelona Supercomputing Center, Spain,
eduard[at]ac.upc.edu
Benedict R. Gaster, Qualcomm, USA, bgaster[at]qti.qualcomm.com
Lee Howes, Qualcomm, USA, lhowes[at]qti.qualcomm.com
Per Stenstrom, Chalmers University of Technology, Sweden, pers[at]chalmers.se
Osman Unsal, Barcelona Supercomputing Center, Spain, osman.unsal[at]bsc.es
Program committee
------------------
Mats Brorsson, KTH Royal Institute of Technology, Sweden
Pascal Felber, University of Neuchatel, Switzerland
Roberto Giorgi, University of Siena, Italy
Hakan Grahn, Blekinge Institute of Technology, Sweden
Ali Jannesari, RWTH Aachen University, Germany
Paul Kelly, Imperial College of London, UK
Mikel Lujan, University of Manchester, UK
Vladimir Marjanovic, High Performance Computing Center Stuttgart, Germany
Tim Mattson, Intel, USA
Simon McIntosh-Smith, University of Bristol, UK
Avi Mendelson, Technion, Israel
Dimitris Nikolopoulos, Queen's University of Belfast, UK
Andy Pimentel, University of Amsterdam, Netherlands
Oscar Plata, University of Malaga, Spain
Yanos Sazeides, University of Cyprus, Cyprus
Ruben Titos, Barcelona Supercomputing Center, Spain
Dongping Zhang, AMD, USA
Workshop website
-----------------
http://research.ac.upc.edu/
Eight Workshop on Programmability Issues for Heterogeneous Multicores
(MULTIPROG-2015)
Held in conjunction with the 10th International Conference on High-Performance
and Embedded Architectures and Compilers (HiPEAC)
Amsterdam, The Netherlands, January 20, 2015
Workshop website: http://research.ac.upc.edu/
Goal of the Workshop
--------------------
Computer manufacturers have embarked on the many-core roadmap, promising to
add more and more cores/hardware threads on their chips. The ever-increasing
number of cores and heterogeneity in architectures has placed new burdens on
the programming community. Software needs to be parallelized and optimized for
accelerators such as GPUs in order to take advantage of the new breed of
multi-/many-core computers. As a result, progress in how to easily harness the
computing power of multi-core architectures is in great demand.
The eighth edition of the MULTIPROG workshop aims to bring together
researchers interested in programming models, runtimes, and computer
architecture. The workshop's emphasis is on heterogeneous architectures and
covers issues such as:
* How can future parallel programming models improve software productivity?
* How should compilers, runtimes and architectures support programming
models and emerging applications?
* How to design efficient data structures and innovative algorithms?
MULTIPROG is intended for quick publication of early results, work-in-progress,
etc., and is not intended to prevent later publication of extended papers.
Informal proceedings with accepted papers will be made available at
the workshop.
Topics of interest
------------------
Papers are sought on topics including, but not limited to:
* Multi-core architectures
o Architectural support for compilers/programming models
o Processor (core) architecture and accelerators
o Memory system architecture
o Performance, power, temperature, and reliability issues
* Heterogeneous computing
o Algorithms and data structures for heterogeneous systems
o Applications for heterogeneous computing and real-time graphics
* Programming models for multi-core architectures
o Language extensions
o Run-time systems
o Compiler optimizations and techniques
* Benchmarking of multi-/many-core architectures
o Tools for discovering and understanding parallelism
o Tools for understanding performance and debugging
o Case studies and performance evaluation
Important dates
---------------
Final submission: October 24, 2014
Author notification: November 28, 2014
Paper submission
----------------
Submissions should not exceed 12 pages and should be formatted according to the
LNCS format for CS Proceedings. This limit includes text, figures, tables and
references.
Please use one of the templates below:
* Latex template:
ftp://ftp.springer.de/pub/tex/
* Word template:
ftp://ftp.springer.de/pub/tex/
Submission link: https://easychair.org/
Organizers
----------
Miquel Pericàs, Chalmers University of Technology, Sweden,
miquelp[at]chalmers.se
Vassilis Papaefstathiou, Chalmers University of Technology, Sweden,
vaspap[at]chalmers.se
Oscar Palomar, Barcelona Supercomputing Center, Spain, oscar.palomar[at]bsc.es
Ferad Zyulkyarov, Barcelona Supercomputing Center, Spain,
ferad.zyulkyarov[at]bsc.es)
Steering committee
------------------
Eduard Ayguade, UPC/Barcelona Supercomputing Center, Spain,
eduard[at]ac.upc.edu
Benedict R. Gaster, Qualcomm, USA, bgaster[at]qti.qualcomm.com
Lee Howes, Qualcomm, USA, lhowes[at]qti.qualcomm.com
Per Stenstrom, Chalmers University of Technology, Sweden, pers[at]chalmers.se
Osman Unsal, Barcelona Supercomputing Center, Spain, osman.unsal[at]bsc.es
Program committee
------------------
Mats Brorsson, KTH Royal Institute of Technology, Sweden
Pascal Felber, University of Neuchatel, Switzerland
Roberto Giorgi, University of Siena, Italy
Hakan Grahn, Blekinge Institute of Technology, Sweden
Ali Jannesari, RWTH Aachen University, Germany
Paul Kelly, Imperial College of London, UK
Mikel Lujan, University of Manchester, UK
Vladimir Marjanovic, High Performance Computing Center Stuttgart, Germany
Tim Mattson, Intel, USA
Simon McIntosh-Smith, University of Bristol, UK
Avi Mendelson, Technion, Israel
Dimitris Nikolopoulos, Queen's University of Belfast, UK
Andy Pimentel, University of Amsterdam, Netherlands
Oscar Plata, University of Malaga, Spain
Yanos Sazeides, University of Cyprus, Cyprus
Ruben Titos, Barcelona Supercomputing Center, Spain
Dongping Zhang, AMD, USA
Workshop website
-----------------
http://research.ac.upc.edu/
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