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ESPM2 2016: Second International Workshop on Extreme Scale Programming Models and Middleware
In conjunction with the International Conference on High Performance Computing, Networking, Storage and Analysis (SC’16), Salt Lake City, Utah, USA, Friday, November 18th, 2016
Held in cooperation with ACM SIGHPC
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Next generation architectures and systems being deployed are characterized by high concurrency, low memory per-core, and multiple levels of hierarchy and heterogeneity. These characteristics bring out new challenges in energy efficiency, fault-tolerance, and scalability. It is commonly believed that software has the biggest share of the responsibility to tackle these challenges. In other words, this responsibility is delegated to the next generation programming models and their associated middleware/runtimes. ESPM2
The Second ESPM2 workshop, to be held with the Supercomputing (SC'2016) conference in Salt Lake City, Texas, will serve as an event for discussion in the areas of programming models and runtimes, language design, compilers, and application development. It will provide a timely meeting for scientists and engineers to present the latest ideas and findings in these rapidly evolving areas. The workshop will particularly focus on innovative approaches in the areas of emerging programming models for large- scale parallel systems and many-core architectures. Topics of interest for the ESPM2 workshop include (but are not limited to):
New programming models, languages, and constructs for exploiting high concurrency and heterogeneity
Experience with and improvements for existing parallel languages and run-time environments such as:
o MPI
o PGAS (UPC, OpenSHMEM, Chapel, CAF, UPC++...)
o Directive-based programming (OpenMP, OpenACC..)
o Asynchronous Task-based models (X10, OCR, Habanero, Legion, Charm++, HPX) and
o Hybrid MPI+X models
Parallel compilers, programming tools, and environments
Software and system support for extreme scalability including fault tolerance
Programming environments for heterogeneous multi-core systems and accelerators such as KNC, KNL, ARM, GPUs, FPGAs, MICs and DSPs
Papers should present original research and should provide sufficient background material to make them accessible to the broader community. One outstanding paper will be selected for the Best Paper Award by the Program Committee.
Best Paper Award
Intel has generously offered to sponsor the Best Paper Award with $500 award. This award will be given to the author(s) of the paper selected by the Technical Program Committee and the Program Chairs. The award will be determined from viewpoints of the technical and scientific merits, impact on the science and engineering of the research work and the clarity of presentation of the research contents in the paper.
Important Dates
Technical paper submission dea
Author notification: September 30th, 2016
Camera-ready deadline: October 7th, 2016
Workshop: November 18th, 2016
Submission
Abstracts and papers need to be submitted via the EasyChair conference system. (https://easychair.org/confere
Submissions are accepted under the following two categories:
Full Paper: Should not exceed 8 pages using ACM format with 10pt font. Each submission must be a single PDF file.
Short Paper: Should not exceed 4 pages using ACM format with 10pt font. Each submission must be a single PDF file.
Submissions must be ACM formatted:
ACM SigHPC will publish the workshop proceedings which will be available through the ACM Digital Library
The papers must contain original content and should not have been previously published or submitted to a peer-reviewed journal/conference
Papers must be submitted in PDF format (readable by Adobe Acrobat Reader 5.0 and higher) and formatted for 8.5" x 11" (U.S. Letter).
The manuscript should be formatted according to ACM format (see http://www.acm.org/sigs/p
At least one of the authors of each accepted paper must register as a participant of the workshop and present the paper at the workshop, in order to have the paper published in the proceedings.
Organizing Committee Program Chairs
• Khaled Hamidouche, The Ohio State University
• Karl Schulz, Intel Corporation
• Hari Subramoni, The Ohio State University
• Dhabaleswar K. (DK) Panda, The Ohio State University
Program Committee
• Francois Bodin, University of Rennes and INRIA, France
• Guang R. Gao, University of Delaware
• Vladimir Getov, University of Westminster, UK
• Jeff Hammond, Intel Labs
• Zhigang Huo, Institute of Computing Technology, Chinese Academy of Sciences, China
• Darren Kerbyson, Pacific Northwest National Laboratory
• Olivier Tardieu, IBM T.J Watson Research Center
• Rajeev Thakur, Argonne National Laboratory
• Abhinav Vishnu, Pacific Northwest National Laboratory
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ESPM2 2016 Co-Chairs
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